mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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240bf1625e
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@11601 3c298f89-4303-0410-b956-a3cf2f4a3e73
87 lines
3.2 KiB
C
87 lines
3.2 KiB
C
#ifndef _BOOT_H
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#define _BOOT_H
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/* All this should be defined somewhere in danube.h later... */
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#define MPS_SRAM_BASE_ADDRESS 0xBF200000
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#define MPS_SRAM_BOOT_OFFSET 0x1C0
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/* Offset for CPU1 (both CPUs have same register set) */
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#define BOOT_BASE_ADDRESS (MPS_SRAM_BASE_ADDRESS + MPS_SRAM_BOOT_OFFSET)
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#define BOOT_CPU_OFFSET 0x20
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#ifdef __ASSEMBLY__
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#define BOOT_RVEC (BOOT_BASE_ADDRESS + 0x00)
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#define BOOT_NVEC (BOOT_BASE_ADDRESS + 0x04)
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#define BOOT_EVEC (BOOT_BASE_ADDRESS + 0x08)
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#define BOOT_CP0_CAUSE (BOOT_BASE_ADDRESS + 0x0C)
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#define BOOT_CP0_EPC (BOOT_BASE_ADDRESS + 0x10)
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#define BOOT_CP0_EEPC (BOOT_BASE_ADDRESS + 0x14)
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#define BOOT_SIZE (BOOT_BASE_ADDRESS + 0x18) /* for CPU1 */
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#define BOOT_RCU_SR (BOOT_BASE_ADDRESS + 0x18) /* for CPU0 */
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#define BOOT_CFG_STAT (BOOT_BASE_ADDRESS + 0x1C)
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#else
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#define BOOT_RVEC(cpu) (volatile u32*)(BOOT_BASE_ADDRESS + (cpu * BOOT_CPU_OFFSET) + 0x00)
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#define BOOT_NVEC(cpu) (volatile u32*)(BOOT_BASE_ADDRESS + (cpu * BOOT_CPU_OFFSET) + 0x04)
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#define BOOT_EVEC(cpu) (volatile u32*)(BOOT_BASE_ADDRESS + (cpu * BOOT_CPU_OFFSET) + 0x08)
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#define BOOT_CP0_STATUS(cpu) (volatile u32*)(BOOT_BASE_ADDRESS + (cpu * BOOT_CPU_OFFSET) + 0x0C)
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#define BOOT_CP0_EPC(cpu) (volatile u32*)(BOOT_BASE_ADDRESS + (cpu * BOOT_CPU_OFFSET) + 0x10)
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#define BOOT_CP0_EEPC(cpu) (volatile u32*)(BOOT_BASE_ADDRESS + (cpu * BOOT_CPU_OFFSET) + 0x14)
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#define BOOT_SIZE(cpu) (volatile u32*)(BOOT_BASE_ADDRESS + (cpu * BOOT_CPU_OFFSET) + 0x18) /* for CPU1 */
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#define BOOT_RCU_SR(cpu) (volatile u32*)(BOOT_BASE_ADDRESS + (cpu * BOOT_CPU_OFFSET) + 0x18) /* for CPU0 */
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#define BOOT_CFG_STAT(cpu) (volatile u32*)(BOOT_BASE_ADDRESS + (cpu * BOOT_CPU_OFFSET) + 0x1C)
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#endif
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#define BOOT_CFG_NOR 0x01
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#define BOOT_CFG_MII 0x02
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#define BOOT_CFG_PCI 0x03
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#define BOOT_CFG_ASC 0x04
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#define BOOT_CFG_SFLASH 0x05
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#define BOOT_CFG_NAND 0x06
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#define BOOT_CFG_RMII 0x07
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#define BOOT_CFG_TEST 0x00
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#define BOOT_NUM_RETRY 3
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#define BOOT_STAT_MASK_ALL 0x0000FFFF
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#define BOOT_STAT_MASK_STAT 0x0000F000
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#define BOOT_STAT_MASK_BERR 0x00000F00
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#define BOOT_STAT_MASK_BSTRAP 0x000000F0
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#define BOOT_STAT_MASK_BMODULE 0x0000000F
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#define BOOT_STAT_INIT 0x00000000
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#define BOOT_STAT_BSTRAP 0x00001000
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#define BOOT_STAT_RETRY 0x00002000
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#define BOOT_STAT_START 0x00003000
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#define BOOT_STAT_HALT 0x0000F000
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#define BOOT_ERR_NO_RVEC 0x00000100
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#define BOOT_ERR_NO_NVEC 0x00000200
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#define BOOT_ERR_NO_EVEC 0x00000300
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#define BOOT_ERR_BSTRAP 0x00000400
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#define BOOT_ERR_EXC 0x00000800
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#ifndef __ASSEMBLY__
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void boot_set_status( u32 status, u32 mask);
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void boot_set_config( u32 config);
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void boot_set_rvec( u32 vector);
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void boot_set_size( u32 size);
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void boot_sdbg( u8* string, u32 value);
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void boot_error( u32 berr);
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int boot_from_ebu(void);
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void _boot_rvec(void);
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typedef struct
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{
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u32 cpu; /** CPU number */
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u32 config; /** Boot configuration */
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u32 endian; /** CPU endianess */
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u32 debug; /** Debug mode */
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u32 (*exit)(void); /** application vector */
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} boot_data;
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extern boot_data bootrom;
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#endif
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#endif /* #ifdef _BOOT_H */
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