mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-27 12:39:53 +02:00
284a2e1864
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@12311 3c298f89-4303-0410-b956-a3cf2f4a3e73
234 lines
6.3 KiB
Diff
234 lines
6.3 KiB
Diff
--- a/drivers/ssb/driver_chipcommon.c
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+++ b/drivers/ssb/driver_chipcommon.c
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@@ -361,37 +361,31 @@
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{
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return chipco_read32(cc, SSB_CHIPCO_GPIOIN) & mask;
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}
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-EXPORT_SYMBOL(ssb_chipco_gpio_in);
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u32 ssb_chipco_gpio_out(struct ssb_chipcommon *cc, u32 mask, u32 value)
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{
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return chipco_write32_masked(cc, SSB_CHIPCO_GPIOOUT, mask, value);
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}
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-EXPORT_SYMBOL(ssb_chipco_gpio_out);
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u32 ssb_chipco_gpio_outen(struct ssb_chipcommon *cc, u32 mask, u32 value)
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{
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return chipco_write32_masked(cc, SSB_CHIPCO_GPIOOUTEN, mask, value);
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}
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-EXPORT_SYMBOL(ssb_chipco_gpio_outen);
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u32 ssb_chipco_gpio_control(struct ssb_chipcommon *cc, u32 mask, u32 value)
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{
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return chipco_write32_masked(cc, SSB_CHIPCO_GPIOCTL, mask, value);
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}
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-EXPORT_SYMBOL(ssb_chipco_gpio_control);
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u32 ssb_chipco_gpio_intmask(struct ssb_chipcommon *cc, u32 mask, u32 value)
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{
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return chipco_write32_masked(cc, SSB_CHIPCO_GPIOIRQ, mask, value);
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}
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-EXPORT_SYMBOL(ssb_chipco_gpio_intmask);
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u32 ssb_chipco_gpio_polarity(struct ssb_chipcommon *cc, u32 mask, u32 value)
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{
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return chipco_write32_masked(cc, SSB_CHIPCO_GPIOPOL, mask, value);
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}
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-EXPORT_SYMBOL(ssb_chipco_gpio_polarity);
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#ifdef CONFIG_SSB_SERIAL
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int ssb_chipco_serial_init(struct ssb_chipcommon *cc,
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--- a/drivers/ssb/driver_extif.c
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+++ b/drivers/ssb/driver_extif.c
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@@ -122,30 +122,25 @@
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{
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return extif_read32(extif, SSB_EXTIF_GPIO_IN) & mask;
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}
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-EXPORT_SYMBOL(ssb_extif_gpio_in);
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u32 ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value)
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{
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return extif_write32_masked(extif, SSB_EXTIF_GPIO_OUT(0),
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mask, value);
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}
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-EXPORT_SYMBOL(ssb_extif_gpio_out);
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u32 ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value)
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{
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return extif_write32_masked(extif, SSB_EXTIF_GPIO_OUTEN(0),
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mask, value);
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}
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-EXPORT_SYMBOL(ssb_extif_gpio_outen);
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u32 ssb_extif_gpio_polarity(struct ssb_extif *extif, u32 mask, u32 value)
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{
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return extif_write32_masked(extif, SSB_EXTIF_GPIO_INTPOL, mask, value);
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}
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-EXPORT_SYMBOL(ssb_extif_gpio_polarity);
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u32 ssb_extif_gpio_intmask(struct ssb_extif *extif, u32 mask, u32 value)
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{
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return extif_write32_masked(extif, SSB_EXTIF_GPIO_INTMASK, mask, value);
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}
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-EXPORT_SYMBOL(ssb_extif_gpio_intmask);
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--- a/drivers/ssb/embedded.c
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+++ b/drivers/ssb/embedded.c
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@@ -11,6 +11,8 @@
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#include <linux/ssb/ssb.h>
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#include <linux/ssb/ssb_embedded.h>
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+#include "ssb_private.h"
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+
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int ssb_watchdog_timer_set(struct ssb_bus *bus, u32 ticks)
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{
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@@ -24,3 +26,107 @@
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}
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return -ENODEV;
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}
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+
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+u32 ssb_gpio_in(struct ssb_bus *bus, u32 mask)
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+{
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+ unsigned long flags;
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+ u32 res = 0;
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+
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+ spin_lock_irqsave(&bus->gpio_lock, flags);
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+ if (ssb_chipco_available(&bus->chipco))
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+ res = ssb_chipco_gpio_in(&bus->chipco, mask);
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+ else if (ssb_extif_available(&bus->extif))
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+ res = ssb_extif_gpio_in(&bus->extif, mask);
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+ else
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+ SSB_WARN_ON(1);
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+ spin_unlock_irqrestore(&bus->gpio_lock, flags);
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+
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+ return res;
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+}
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+EXPORT_SYMBOL(ssb_gpio_in);
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+
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+u32 ssb_gpio_out(struct ssb_bus *bus, u32 mask, u32 value)
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+{
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+ unsigned long flags;
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+ u32 res = 0;
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+
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+ spin_lock_irqsave(&bus->gpio_lock, flags);
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+ if (ssb_chipco_available(&bus->chipco))
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+ res = ssb_chipco_gpio_out(&bus->chipco, mask, value);
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+ else if (ssb_extif_available(&bus->extif))
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+ res = ssb_extif_gpio_out(&bus->extif, mask, value);
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+ else
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+ SSB_WARN_ON(1);
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+ spin_unlock_irqrestore(&bus->gpio_lock, flags);
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+
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+ return res;
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+}
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+EXPORT_SYMBOL(ssb_gpio_out);
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+
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+u32 ssb_gpio_outen(struct ssb_bus *bus, u32 mask, u32 value)
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+{
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+ unsigned long flags;
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+ u32 res = 0;
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+
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+ spin_lock_irqsave(&bus->gpio_lock, flags);
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+ if (ssb_chipco_available(&bus->chipco))
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+ res = ssb_chipco_gpio_outen(&bus->chipco, mask, value);
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+ else if (ssb_extif_available(&bus->extif))
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+ res = ssb_extif_gpio_outen(&bus->extif, mask, value);
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+ else
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+ SSB_WARN_ON(1);
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+ spin_unlock_irqrestore(&bus->gpio_lock, flags);
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+
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+ return res;
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+}
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+EXPORT_SYMBOL(ssb_gpio_outen);
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+
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+u32 ssb_gpio_control(struct ssb_bus *bus, u32 mask, u32 value)
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+{
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+ unsigned long flags;
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+ u32 res = 0;
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+
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+ spin_lock_irqsave(&bus->gpio_lock, flags);
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+ if (ssb_chipco_available(&bus->chipco))
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+ res = ssb_chipco_gpio_control(&bus->chipco, mask, value);
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+ spin_unlock_irqrestore(&bus->gpio_lock, flags);
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+
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+ return res;
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+}
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+EXPORT_SYMBOL(ssb_gpio_control);
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+
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+u32 ssb_gpio_intmask(struct ssb_bus *bus, u32 mask, u32 value)
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+{
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+ unsigned long flags;
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+ u32 res = 0;
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+
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+ spin_lock_irqsave(&bus->gpio_lock, flags);
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+ if (ssb_chipco_available(&bus->chipco))
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+ res = ssb_chipco_gpio_intmask(&bus->chipco, mask, value);
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+ else if (ssb_extif_available(&bus->extif))
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+ res = ssb_extif_gpio_intmask(&bus->extif, mask, value);
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+ else
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+ SSB_WARN_ON(1);
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+ spin_unlock_irqrestore(&bus->gpio_lock, flags);
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+
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+ return res;
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+}
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+EXPORT_SYMBOL(ssb_gpio_intmask);
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+
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+u32 ssb_gpio_polarity(struct ssb_bus *bus, u32 mask, u32 value)
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+{
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+ unsigned long flags;
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+ u32 res = 0;
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+
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+ spin_lock_irqsave(&bus->gpio_lock, flags);
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+ if (ssb_chipco_available(&bus->chipco))
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+ res = ssb_chipco_gpio_polarity(&bus->chipco, mask, value);
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+ else if (ssb_extif_available(&bus->extif))
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+ res = ssb_extif_gpio_polarity(&bus->extif, mask, value);
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+ else
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+ SSB_WARN_ON(1);
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+ spin_unlock_irqrestore(&bus->gpio_lock, flags);
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+
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+ return res;
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+}
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+EXPORT_SYMBOL(ssb_gpio_polarity);
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--- a/include/linux/ssb/ssb.h
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+++ b/include/linux/ssb/ssb.h
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@@ -283,6 +283,11 @@
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/* Contents of the SPROM. */
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struct ssb_sprom sprom;
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+#ifdef CONFIG_SSB_EMBEDDED
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+ /* Lock for GPIO register access. */
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+ spinlock_t gpio_lock;
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+#endif /* EMBEDDED */
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+
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/* Internal-only stuff follows. Do not touch. */
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struct list_head list;
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#ifdef CONFIG_SSB_DEBUG
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--- a/include/linux/ssb/ssb_embedded.h
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+++ b/include/linux/ssb/ssb_embedded.h
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@@ -7,4 +7,12 @@
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extern int ssb_watchdog_timer_set(struct ssb_bus *bus, u32 ticks);
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+/* Generic GPIO API */
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+u32 ssb_gpio_in(struct ssb_bus *bus, u32 mask);
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+u32 ssb_gpio_out(struct ssb_bus *bus, u32 mask, u32 value);
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+u32 ssb_gpio_outen(struct ssb_bus *bus, u32 mask, u32 value);
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+u32 ssb_gpio_control(struct ssb_bus *bus, u32 mask, u32 value);
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+u32 ssb_gpio_intmask(struct ssb_bus *bus, u32 mask, u32 value);
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+u32 ssb_gpio_polarity(struct ssb_bus *bus, u32 mask, u32 value);
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+
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#endif /* LINUX_SSB_EMBEDDED_H_ */
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--- a/drivers/ssb/main.c
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+++ b/drivers/ssb/main.c
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@@ -571,6 +571,9 @@
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spin_lock_init(&bus->bar_lock);
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INIT_LIST_HEAD(&bus->list);
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+#ifdef CONFIG_SSB_EMBEDDED
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+ spin_lock_init(&bus->gpio_lock);
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+#endif
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/* Powerup the bus */
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err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
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