mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-08-21 20:55:51 +03:00
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31335 3c298f89-4303-0410-b956-a3cf2f4a3e73
260 lines
8.8 KiB
Diff
260 lines
8.8 KiB
Diff
From 20ed991ce59030544426dc3422da7ee76667537b Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Thu, 8 Mar 2012 08:37:25 +0100
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Subject: [PATCH 21/73] MIPS: lantiq: use devres managed gpios
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3.2 introduced devm_request_gpio() to allow managed gpios.
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The devres api requires a struct device pointer to work. Add a parameter to ltq_gpio_request()
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so that managed gpios can work.
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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.../include/asm/mach-lantiq/falcon/lantiq_soc.h | 4 +---
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arch/mips/include/asm/mach-lantiq/lantiq.h | 4 ++++
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.../mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 3 ---
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arch/mips/lantiq/falcon/gpio.c | 4 ++--
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arch/mips/lantiq/falcon/prom.c | 7 -------
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arch/mips/lantiq/xway/gpio.c | 4 ++--
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arch/mips/lantiq/xway/gpio_stp.c | 13 ++++++++-----
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arch/mips/pci/pci-lantiq.c | 18 ++++++++++--------
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drivers/net/ethernet/lantiq_etop.c | 9 ++++++---
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drivers/tty/serial/lantiq.c | 12 ++++++++++++
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10 files changed, 45 insertions(+), 33 deletions(-)
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--- a/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
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+++ b/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
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@@ -126,9 +126,7 @@ extern __iomem void *ltq_sys1_membase;
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#define ltq_sys1_w32_mask(clear, set, reg) \
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ltq_sys1_w32((ltq_sys1_r32(reg) & ~(clear)) | (set), reg)
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-/* gpio_request wrapper to help configure the pin */
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-extern int ltq_gpio_request(unsigned int pin, unsigned int mux,
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- unsigned int dir, const char *name);
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+/* gpio wrapper to help configure the pin muxing */
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extern int ltq_gpio_mux_set(unsigned int pin, unsigned int mux);
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/* to keep the irq code generic we need to define these to 0 as falcon
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--- a/arch/mips/include/asm/mach-lantiq/lantiq.h
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+++ b/arch/mips/include/asm/mach-lantiq/lantiq.h
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@@ -37,6 +37,10 @@ extern unsigned int ltq_get_soc_type(voi
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/* spinlock all ebu i/o */
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extern spinlock_t ebu_lock;
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+/* request a non-gpio and set the PIO config */
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+extern int ltq_gpio_request(struct device *dev, unsigned int pin,
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+ unsigned int mux, unsigned int dir, const char *name);
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+
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/* some irq helpers */
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extern void ltq_disable_irq(struct irq_data *data);
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extern void ltq_mask_and_ack_irq(struct irq_data *data);
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--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
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+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
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@@ -145,9 +145,6 @@
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extern __iomem void *ltq_ebu_membase;
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extern __iomem void *ltq_cgu_membase;
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-/* request a non-gpio and set the PIO config */
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-extern int ltq_gpio_request(unsigned int pin, unsigned int mux,
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- unsigned int dir, const char *name);
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extern void ltq_pmu_enable(unsigned int module);
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extern void ltq_pmu_disable(unsigned int module);
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extern void ltq_cgu_enable(unsigned int clk);
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--- a/arch/mips/lantiq/falcon/gpio.c
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+++ b/arch/mips/lantiq/falcon/gpio.c
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@@ -97,7 +97,7 @@ int ltq_gpio_mux_set(unsigned int pin, u
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}
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EXPORT_SYMBOL(ltq_gpio_mux_set);
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-int ltq_gpio_request(unsigned int pin, unsigned int mux,
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+int ltq_gpio_request(struct device *dev, unsigned int pin, unsigned int mux,
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unsigned int dir, const char *name)
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{
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int port = pin / 100;
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@@ -106,7 +106,7 @@ int ltq_gpio_request(unsigned int pin, u
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if (offset >= PINS_PER_PORT || port >= MAX_PORTS)
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return -EINVAL;
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- if (gpio_request(pin, name)) {
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+ if (devm_gpio_request(dev, pin, name)) {
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pr_err("failed to setup lantiq gpio: %s\n", name);
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return -EBUSY;
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}
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--- a/arch/mips/lantiq/falcon/prom.c
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+++ b/arch/mips/lantiq/falcon/prom.c
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@@ -27,9 +27,6 @@
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#define TYPE_SHIFT 26
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#define TYPE_MASK 0x3C000000
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-#define MUXC_SIF_RX_PIN 112
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-#define MUXC_SIF_TX_PIN 113
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-
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/* this parameter allows us enable/disable asc1 via commandline */
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static int register_asc1;
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static int __init
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@@ -48,10 +45,6 @@ ltq_soc_setup(void)
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falcon_register_gpio();
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if (register_asc1) {
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ltq_register_asc(1);
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- if (ltq_gpio_request(MUXC_SIF_RX_PIN, 3, 0, "asc1-rx"))
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- pr_err("failed to request asc1-rx");
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- if (ltq_gpio_request(MUXC_SIF_TX_PIN, 3, 1, "asc1-tx"))
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- pr_err("failed to request asc1-tx");
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ltq_sysctl_activate(SYSCTL_SYS1, ACTS_ASC1_ACT);
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}
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}
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--- a/arch/mips/lantiq/xway/gpio.c
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+++ b/arch/mips/lantiq/xway/gpio.c
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@@ -50,14 +50,14 @@ int irq_to_gpio(unsigned int gpio)
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}
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EXPORT_SYMBOL(irq_to_gpio);
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-int ltq_gpio_request(unsigned int pin, unsigned int mux,
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+int ltq_gpio_request(struct device *dev, unsigned int pin, unsigned int mux,
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unsigned int dir, const char *name)
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{
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int id = 0;
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if (pin >= (MAX_PORTS * PINS_PER_PORT))
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return -EINVAL;
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- if (gpio_request(pin, name)) {
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+ if (devm_gpio_request(dev, pin, name)) {
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pr_err("failed to setup lantiq gpio: %s\n", name);
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return -EBUSY;
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}
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--- a/arch/mips/lantiq/xway/gpio_stp.c
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+++ b/arch/mips/lantiq/xway/gpio_stp.c
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@@ -80,11 +80,6 @@ static struct gpio_chip ltq_stp_chip = {
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static int ltq_stp_hw_init(void)
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{
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- /* the 3 pins used to control the external stp */
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- ltq_gpio_request(4, 2, 1, "stp-st");
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- ltq_gpio_request(5, 2, 1, "stp-d");
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- ltq_gpio_request(6, 2, 1, "stp-sh");
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-
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/* sane defaults */
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ltq_stp_w32(0, LTQ_STP_AR);
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ltq_stp_w32(0, LTQ_STP_CPU0);
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@@ -133,6 +128,14 @@ static int __devinit ltq_stp_probe(struc
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dev_err(&pdev->dev, "failed to remap STP memory\n");
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return -ENOMEM;
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}
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+
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+ /* the 3 pins used to control the external stp */
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+ if (ltq_gpio_request(&pdev->dev, 4, 2, 1, "stp-st") ||
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+ ltq_gpio_request(&pdev->dev, 5, 2, 1, "stp-d") ||
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+ ltq_gpio_request(&pdev->dev, 6, 2, 1, "stp-sh")) {
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+ dev_err(&pdev->dev, "failed to request needed gpios\n");
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+ return -EBUSY;
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+ }
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ret = gpiochip_add(<q_stp_chip);
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if (!ret)
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ret = ltq_stp_hw_init();
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--- a/arch/mips/pci/pci-lantiq.c
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+++ b/arch/mips/pci/pci-lantiq.c
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@@ -150,24 +150,26 @@ static u32 ltq_calc_bar11mask(void)
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return bar11mask;
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}
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-static void ltq_pci_setup_gpio(int gpio)
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+static void ltq_pci_setup_gpio(struct device *dev)
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{
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+ struct ltq_pci_data *conf = (struct ltq_pci_data *) dev->platform_data;
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int i;
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for (i = 0; i < ARRAY_SIZE(ltq_pci_gpio_map); i++) {
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- if (gpio & (1 << i)) {
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- ltq_gpio_request(ltq_pci_gpio_map[i].pin,
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+ if (conf->gpio & (1 << i)) {
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+ ltq_gpio_request(dev, ltq_pci_gpio_map[i].pin,
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ltq_pci_gpio_map[i].mux,
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ltq_pci_gpio_map[i].dir,
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ltq_pci_gpio_map[i].name);
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}
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}
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- ltq_gpio_request(21, 0, 1, "pci-reset");
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- ltq_pci_req_mask = (gpio >> PCI_REQ_SHIFT) & PCI_REQ_MASK;
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+ ltq_gpio_request(dev, 21, 0, 1, "pci-reset");
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+ ltq_pci_req_mask = (conf->gpio >> PCI_REQ_SHIFT) & PCI_REQ_MASK;
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}
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-static int __devinit ltq_pci_startup(struct ltq_pci_data *conf)
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+static int __devinit ltq_pci_startup(struct device *dev)
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{
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u32 temp_buffer;
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+ struct ltq_pci_data *conf = (struct ltq_pci_data *) dev->platform_data;
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/* set clock to 33Mhz */
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if (ltq_is_ar9()) {
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@@ -190,7 +192,7 @@ static int __devinit ltq_pci_startup(str
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}
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/* setup pci clock and gpis used by pci */
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- ltq_pci_setup_gpio(conf->gpio);
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+ ltq_pci_setup_gpio(dev);
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/* enable auto-switching between PCI and EBU */
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ltq_pci_w32(0xa, PCI_CR_CLK_CTRL);
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@@ -275,7 +277,7 @@ static int __devinit ltq_pci_probe(struc
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ioremap_nocache(LTQ_PCI_CFG_BASE, LTQ_PCI_CFG_BASE);
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ltq_pci_controller.io_map_base =
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(unsigned long)ioremap(LTQ_PCI_IO_BASE, LTQ_PCI_IO_SIZE - 1);
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- ltq_pci_startup(ltq_pci_data);
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+ ltq_pci_startup(&pdev->dev);
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register_pci_controller(<q_pci_controller);
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return 0;
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--- a/drivers/net/ethernet/lantiq_etop.c
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+++ b/drivers/net/ethernet/lantiq_etop.c
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@@ -291,9 +291,6 @@ ltq_etop_gbit_init(void)
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{
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ltq_pmu_enable(PMU_SWITCH);
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- ltq_gpio_request(42, 2, 1, "MDIO");
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- ltq_gpio_request(43, 2, 1, "MDC");
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-
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ltq_gbit_w32_mask(0, GCTL0_SE, LTQ_GBIT_GCTL0);
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/** Disable MDIO auto polling mode */
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ltq_gbit_w32_mask(0, PX_CTL_DMDIO, LTQ_GBIT_P0_CTL);
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@@ -868,6 +865,12 @@ ltq_etop_probe(struct platform_device *p
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err = -ENOMEM;
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goto err_out;
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}
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+ if (ltq_gpio_request(&pdev->dev, 42, 2, 1, "MDIO") ||
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+ ltq_gpio_request(&pdev->dev, 43, 2, 1, "MDC")) {
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+ dev_err(&pdev->dev, "failed to request MDIO gpios\n");
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+ err = -EBUSY;
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+ goto err_out;
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+ }
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}
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dev = alloc_etherdev_mq(sizeof(struct ltq_etop_priv), 4);
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--- a/drivers/tty/serial/lantiq.c
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+++ b/drivers/tty/serial/lantiq.c
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@@ -107,6 +107,9 @@
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#define ASCFSTAT_TXFREEMASK 0x3F000000
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#define ASCFSTAT_TXFREEOFF 24
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+#define MUXC_SIF_RX_PIN 112
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+#define MUXC_SIF_TX_PIN 113
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+
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static void lqasc_tx_chars(struct uart_port *port);
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static struct ltq_uart_port *lqasc_port[MAXPORTS];
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static struct uart_driver lqasc_reg;
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@@ -529,6 +532,15 @@ lqasc_request_port(struct uart_port *por
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if (port->membase == NULL)
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return -ENOMEM;
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}
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+ if (ltq_is_falcon() && (port->line == 1)) {
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+ struct ltq_uart_port *ltq_port = lqasc_port[pdev->id];
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+ if (ltq_gpio_request(&pdev->dev, MUXC_SIF_RX_PIN,
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+ 3, 0, "asc1-rx"))
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+ return -EBUSY;
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+ if (ltq_gpio_request(&pdev->dev, MUXC_SIF_TX_PIN,
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+ 3, 1, "asc1-tx"))
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+ return -EBUSY;
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+ }
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return 0;
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}
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