mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-27 22:53:09 +02:00
95ef6e1d42
Thank you Peter Wagner for the patch. I refreshed the kernel patches and added the md5sum of the kernel. git-svn-id: svn://svn.openwrt.org/openwrt/trunk@26905 3c298f89-4303-0410-b956-a3cf2f4a3e73
538 lines
14 KiB
Diff
538 lines
14 KiB
Diff
--- a/arch/arm/mach-omap2/board-n8x0.c
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+++ b/arch/arm/mach-omap2/board-n8x0.c
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@@ -23,6 +23,9 @@
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#include <linux/spi/spi.h>
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#include <linux/usb/musb.h>
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#include <sound/tlv320aic3x.h>
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+#include <linux/input.h>
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+#include <linux/i2c/lm8323.h>
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+#include <linux/spi/tsc2005.h>
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#include <asm/mach/arch.h>
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#include <asm/mach-types.h>
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@@ -36,6 +39,7 @@
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#include <plat/mmc.h>
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#include <plat/serial.h>
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#include <plat/cbus.h>
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+#include <plat/gpio-switch.h>
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#include "mux.h"
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@@ -43,6 +47,221 @@ static int slot1_cover_open;
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static int slot2_cover_open;
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static struct device *mmc_device;
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+/* We map the FN key as LALT to workaround an X keycode problem.
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+ * The XKB map needs to be adjusted to support this. */
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+#define MAP_FN_AS_LEFTALT
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+
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+static s16 rx44_keymap[LM8323_KEYMAP_SIZE] = {
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+ [0x01] = KEY_Q,
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+ [0x02] = KEY_K,
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+ [0x03] = KEY_O,
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+ [0x04] = KEY_P,
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+ [0x05] = KEY_BACKSPACE,
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+ [0x06] = KEY_A,
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+ [0x07] = KEY_S,
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+ [0x08] = KEY_D,
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+ [0x09] = KEY_F,
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+ [0x0a] = KEY_G,
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+ [0x0b] = KEY_H,
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+ [0x0c] = KEY_J,
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+
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+ [0x11] = KEY_W,
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+ [0x12] = KEY_F4,
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+ [0x13] = KEY_L,
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+ [0x14] = KEY_APOSTROPHE,
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+ [0x16] = KEY_Z,
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+ [0x17] = KEY_X,
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+ [0x18] = KEY_C,
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+ [0x19] = KEY_V,
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+ [0x1a] = KEY_B,
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+ [0x1b] = KEY_N,
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+ [0x1c] = KEY_LEFTSHIFT, /* Actually, this is both shift keys */
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+ [0x1f] = KEY_F7,
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+
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+ [0x21] = KEY_E,
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+ [0x22] = KEY_SEMICOLON,
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+ [0x23] = KEY_MINUS,
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+ [0x24] = KEY_EQUAL,
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+#ifdef MAP_FN_AS_LEFTALT
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+ [0x2b] = KEY_LEFTALT,
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+#else
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+ [0x2b] = KEY_FN,
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+#endif
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+ [0x2c] = KEY_M,
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+ [0x2f] = KEY_F8,
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+
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+ [0x31] = KEY_R,
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+ [0x32] = KEY_RIGHTCTRL,
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+ [0x34] = KEY_SPACE,
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+ [0x35] = KEY_COMMA,
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+ [0x37] = KEY_UP,
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+ [0x3c] = KEY_COMPOSE,
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+ [0x3f] = KEY_F6,
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+
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+ [0x41] = KEY_T,
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+ [0x44] = KEY_DOT,
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+ [0x46] = KEY_RIGHT,
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+ [0x4f] = KEY_F5,
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+ [0x51] = KEY_Y,
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+ [0x53] = KEY_DOWN,
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+ [0x55] = KEY_ENTER,
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+ [0x5f] = KEY_ESC,
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+
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+ [0x61] = KEY_U,
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+ [0x64] = KEY_LEFT,
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+
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+ [0x71] = KEY_I,
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+ [0x75] = KEY_KPENTER,
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+};
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+
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+static struct lm8323_platform_data lm8323_pdata = {
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+ .repeat = 0, /* Repeat is handled in userspace for now. */
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+ .keymap = rx44_keymap,
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+ .size_x = 8,
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+ .size_y = 12,
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+ .debounce_time = 12,
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+ .active_time = 500,
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+
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+ .name = "Internal keyboard",
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+ .pwm_names[0] = "n810::keyboard",
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+ .pwm_names[1] = "n810::cover",
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+};
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+
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+#define OMAP_TAG_NOKIA_BT 0x4e01
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+
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+struct omap_bluetooth_config {
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+ u8 chip_type;
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+ u8 bt_wakeup_gpio;
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+ u8 host_wakeup_gpio;
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+ u8 reset_gpio;
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+ u8 bt_uart;
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+ u8 bd_addr[6];
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+ u8 bt_sysclk;
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+};
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+
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+static struct platform_device n8x0_bt_device = {
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+ .name = "hci_h4p",
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+ .id = -1,
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+ .num_resources = 0,
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+};
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+
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+void __init n8x0_bt_init(void)
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+{
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+ const struct omap_bluetooth_config *bt_config;
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+
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+ bt_config = (void *) omap_get_config(OMAP_TAG_NOKIA_BT,
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+ struct omap_bluetooth_config);
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+ n8x0_bt_device.dev.platform_data = (void *) bt_config;
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+ if (platform_device_register(&n8x0_bt_device) < 0)
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+ BUG();
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+}
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+
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+#define RX51_TSC2005_RESET_GPIO 94
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+#define RX51_TSC2005_IRQ_GPIO 106
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+
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+#ifdef CONFIG_TOUCHSCREEN_TSC2005
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+static struct tsc2005_platform_data tsc2005_config;
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+static void rx51_tsc2005_set_reset(bool enable)
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+{
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+ gpio_set_value(RX51_TSC2005_RESET_GPIO, enable);
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+}
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+
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+static struct omap2_mcspi_device_config tsc2005_mcspi_config = {
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+ .turbo_mode = 0,
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+ .single_channel = 1,
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+};
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+#endif
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+
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+static void __init tsc2005_set_config(void)
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+{
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+ const struct omap_lcd_config *conf;
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+
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+ conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config);
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+ if (conf != NULL) {
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+#ifdef CONFIG_TOUCHSCREEN_TSC2005
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+ if (strcmp(conf->panel_name, "lph8923") == 0) {
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+ tsc2005_config.ts_x_plate_ohm = 180;
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+ tsc2005_config.ts_hw_avg = 0;
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+ tsc2005_config.ts_ignore_last = 0;
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+ tsc2005_config.ts_touch_pressure = 1500;
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+ tsc2005_config.ts_stab_time = 100;
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+ tsc2005_config.ts_pressure_max = 2048;
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+ tsc2005_config.ts_pressure_fudge = 2;
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+ tsc2005_config.ts_x_max = 4096;
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+ tsc2005_config.ts_x_fudge = 4;
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+ tsc2005_config.ts_y_max = 4096;
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+ tsc2005_config.ts_y_fudge = 7;
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+ tsc2005_config.set_reset = rx51_tsc2005_set_reset;
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+ } else if (strcmp(conf->panel_name, "ls041y3") == 0) {
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+ tsc2005_config.ts_x_plate_ohm = 280;
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+ tsc2005_config.ts_hw_avg = 0;
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+ tsc2005_config.ts_ignore_last = 0;
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+ tsc2005_config.ts_touch_pressure = 1500;
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+ tsc2005_config.ts_stab_time = 1000;
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+ tsc2005_config.ts_pressure_max = 2048;
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+ tsc2005_config.ts_pressure_fudge = 2;
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+ tsc2005_config.ts_x_max = 4096;
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+ tsc2005_config.ts_x_fudge = 4;
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+ tsc2005_config.ts_y_max = 4096;
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+ tsc2005_config.ts_y_fudge = 7;
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+ tsc2005_config.set_reset = rx51_tsc2005_set_reset;
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+ } else {
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+ printk(KERN_ERR "Unknown panel type, set default "
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+ "touchscreen configuration\n");
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+ tsc2005_config.ts_x_plate_ohm = 200;
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+ tsc2005_config.ts_stab_time = 100;
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+ }
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+#endif
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+ }
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+}
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+
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+static struct omap2_mcspi_device_config mipid_mcspi_config = {
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+ .turbo_mode = 0,
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+ .single_channel = 1,
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+};
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+
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+extern struct mipid_platform_data n8x0_mipid_platform_data;
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+
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+extern void n8x0_mipid_init(void);
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+extern void n8x0_blizzard_init(void);
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+
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+static struct omap_gpio_switch n8x0_gpio_switches[] __initdata = {
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+ {
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+ .name = "headphone",
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+ .gpio = -1,
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+ .debounce_rising = 200,
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+ .debounce_falling = 200,
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+ }, {
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+ .name = "cam_act",
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+ .gpio = -1,
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+ .debounce_rising = 200,
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+ .debounce_falling = 200,
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+ }, {
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+ .name = "cam_turn",
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+ .gpio = -1,
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+ .debounce_rising = 100,
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+ .debounce_falling = 100,
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+ }, {
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+ .name = "slide",
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+ .gpio = -1,
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+ .debounce_rising = 200,
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+ .debounce_falling = 200,
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+ }, {
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+ .name = "kb_lock",
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+ .gpio = -1,
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+ .debounce_rising = 200,
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+ .debounce_falling = 200,
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+ },
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+};
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+
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+static void __init n8x0_gpio_switches_init(void)
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+{
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+ /* The switches are actually registered through ATAG mechanism.
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+ * This just updates the parameters (thus .gpio is -1) */
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+ omap_register_gpio_switches(n8x0_gpio_switches,
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+ ARRAY_SIZE(n8x0_gpio_switches));
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+}
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+
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#define TUSB6010_ASYNC_CS 1
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#define TUSB6010_SYNC_CS 4
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#define TUSB6010_GPIO_INT 58
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@@ -146,12 +365,29 @@ static struct omap2_mcspi_device_config
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static struct spi_board_info n800_spi_board_info[] __initdata = {
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{
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+ .modalias = "lcd_mipid",
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+ .bus_num = 1,
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+ .chip_select = 1,
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+ .max_speed_hz = 4000000,
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+ .controller_data= &mipid_mcspi_config,
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+ .platform_data = &n8x0_mipid_platform_data,
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+ },
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+ {
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.modalias = "p54spi",
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.bus_num = 2,
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.chip_select = 0,
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.max_speed_hz = 48000000,
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.controller_data = &p54spi_mcspi_config,
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},
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+ {
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+ .modalias = "tsc2005",
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+ .bus_num = 1,
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+ .chip_select = 0,
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+ .irq = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),
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+ .max_speed_hz = 6000000,
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+ .controller_data = &tsc2005_mcspi_config,
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+ .platform_data = &tsc2005_config,
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+ },
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};
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#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
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@@ -727,6 +963,11 @@ static struct aic3x_pdata n810_aic33_dat
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};
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static struct i2c_board_info n810_i2c_board_info_2[] __initdata = {
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+ {
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+ I2C_BOARD_INFO("lm8323", 0x45),
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+ .irq = OMAP_GPIO_IRQ(109),
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+ .platform_data = &lm8323_pdata,
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+ },
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{
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I2C_BOARD_INFO("tlv320aic3x", 0x18),
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.platform_data = &n810_aic33_data,
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@@ -796,9 +1037,12 @@ static inline void board_serial_init(voi
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static void __init n8x0_init_machine(void)
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{
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omap2420_mux_init(board_mux, OMAP_PACKAGE_ZAC);
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+ n8x0_gpio_switches_init();
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n8x0_cbus_init();
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+ n8x0_bt_init();
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/* FIXME: add n810 spi devices */
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+ tsc2005_set_config();
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spi_register_board_info(n800_spi_board_info,
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ARRAY_SIZE(n800_spi_board_info));
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omap_register_i2c_bus(1, 400, n8x0_i2c_board_info_1,
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@@ -808,6 +1052,8 @@ static void __init n8x0_init_machine(voi
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i2c_register_board_info(2, n810_i2c_board_info_2,
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ARRAY_SIZE(n810_i2c_board_info_2));
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board_serial_init();
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+ n8x0_mipid_init();
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+ n8x0_blizzard_init();
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gpmc_onenand_init(board_onenand_data);
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n8x0_mmc_init();
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n8x0_usb_init();
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--- /dev/null
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+++ b/arch/arm/mach-omap2/board-n8x0-lcd.c
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@@ -0,0 +1,141 @@
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+/*
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+ * linux/arch/arm/mach-omap2/board-n8x0.c
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+ *
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+ * Copyright (C) 2005-2009 Nokia Corporation
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+ * Author: Juha Yrjola <juha.yrjola@nokia.com>
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+ *
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+ * Modified from mach-omap2/board-generic.c
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ */
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+
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+#include <linux/clk.h>
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+#include <linux/delay.h>
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+#include <linux/gpio.h>
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+#include <linux/omapfb.h>
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+
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+#include <plat/lcd_mipid.h>
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+#include <plat/blizzard.h>
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+
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+#include <../drivers/cbus/tahvo.h>
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+
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+#define N8X0_BLIZZARD_POWERDOWN_GPIO 15
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+
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+// MIPID LCD Panel
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+
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+static void mipid_shutdown(struct mipid_platform_data *pdata)
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+{
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+ if (pdata->nreset_gpio != -1) {
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+ pr_info("shutdown LCD\n");
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+ gpio_set_value(pdata->nreset_gpio, 0);
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+ msleep(120);
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+ }
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+}
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+
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+struct mipid_platform_data n8x0_mipid_platform_data = {
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+ .shutdown = mipid_shutdown,
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+};
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+
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+void __init n8x0_mipid_init(void)
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+{
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+ const struct omap_lcd_config *conf;
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+ int err;
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+
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+ conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config);
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+ if (conf != NULL) {
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+ n8x0_mipid_platform_data.nreset_gpio = conf->nreset_gpio;
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+ n8x0_mipid_platform_data.data_lines = conf->data_lines;
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+ if (conf->nreset_gpio != -1) {
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+ err = gpio_request(conf->nreset_gpio, "MIPID nreset");
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+ if (err) {
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+ printk(KERN_ERR "N8x0 MIPID failed to request nreset GPIO %d\n",
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+ conf->nreset_gpio);
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+ } else {
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+ err = gpio_direction_output(conf->nreset_gpio, 1);
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+ if (err) {
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+ printk(KERN_ERR "N8x0 MIPID failed to set nreset GPIO %d\n",
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+ conf->nreset_gpio);
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+ }
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+ }
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+ }
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+ printk(KERN_INFO "N8x0 MIPID config loaded");
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+ }
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+ else
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+ printk(KERN_INFO "N8x0 MIPID config not provided");
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+}
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+
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+
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+// Epson Blizzard LCD Controller
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+
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+static struct {
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+ struct clk *sys_ck;
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+} blizzard;
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+
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+static int blizzard_get_clocks(void)
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+{
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+ blizzard.sys_ck = clk_get(0, "osc_ck");
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+ if (IS_ERR(blizzard.sys_ck)) {
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+ printk(KERN_ERR "can't get Blizzard clock\n");
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+ return PTR_ERR(blizzard.sys_ck);
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+ }
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+ return 0;
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+}
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+
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+static unsigned long blizzard_get_clock_rate(struct device *dev)
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+{
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+ return clk_get_rate(blizzard.sys_ck);
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+}
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+
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+static void blizzard_enable_clocks(int enable)
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+{
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+ if (enable)
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+ clk_enable(blizzard.sys_ck);
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+ else
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+ clk_disable(blizzard.sys_ck);
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+}
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+
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+static void blizzard_power_up(struct device *dev)
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+{
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+ /* Vcore to 1.475V */
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+ tahvo_set_clear_reg_bits(0x07, 0, 0xf);
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+ msleep(10);
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+
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+ blizzard_enable_clocks(1);
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+ gpio_set_value(N8X0_BLIZZARD_POWERDOWN_GPIO, 1);
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+}
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+
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+static void blizzard_power_down(struct device *dev)
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+{
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+ gpio_set_value(N8X0_BLIZZARD_POWERDOWN_GPIO, 0);
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+ blizzard_enable_clocks(0);
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+
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+ /* Vcore to 1.005V */
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+ tahvo_set_clear_reg_bits(0x07, 0xf, 0);
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+}
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+
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+static struct blizzard_platform_data n8x0_blizzard_data = {
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+ .power_up = blizzard_power_up,
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+ .power_down = blizzard_power_down,
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+ .get_clock_rate = blizzard_get_clock_rate,
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+ .te_connected = 1,
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+};
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+
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+void __init n8x0_blizzard_init(void)
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+{
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+ int r;
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+
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+ r = gpio_request(N8X0_BLIZZARD_POWERDOWN_GPIO, "Blizzard pd");
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+ if (r < 0)
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+ {
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+ printk(KERN_ERR "Can't get N8x0 Blizzard powerdown GPIO %d\n", N8X0_BLIZZARD_POWERDOWN_GPIO);
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+ return;
|
|
+ }
|
|
+ gpio_direction_output(N8X0_BLIZZARD_POWERDOWN_GPIO, 1);
|
|
+
|
|
+ blizzard_get_clocks();
|
|
+ omapfb_set_ctrl_platform_data(&n8x0_blizzard_data);
|
|
+
|
|
+ printk(KERN_INFO "N8x0 Blizzard initialized");
|
|
+}
|
|
--- a/arch/arm/mach-omap2/Makefile
|
|
+++ b/arch/arm/mach-omap2/Makefile
|
|
@@ -177,6 +177,7 @@ obj-$(CONFIG_MACH_OMAP_3430SDP) += boar
|
|
hsmmc.o \
|
|
board-flash.o
|
|
obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0.o
|
|
+obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0-lcd.o
|
|
obj-$(CONFIG_MACH_NOKIA_RM680) += board-rm680.o \
|
|
sdram-nokia.o \
|
|
hsmmc.o
|
|
--- /dev/null
|
|
+++ b/arch/arm/plat-omap/include/plat/cbus.h
|
|
@@ -0,0 +1,40 @@
|
|
+/*
|
|
+ * cbus.h - CBUS platform_data definition
|
|
+ *
|
|
+ * Copyright (C) 2004 - 2009 Nokia Corporation
|
|
+ *
|
|
+ * Written by Felipe Balbi <felipe.balbi@nokia.com>
|
|
+ *
|
|
+ * This file is subject to the terms and conditions of the GNU General
|
|
+ * Public License. See the file "COPYING" in the main directory of this
|
|
+ * archive for more details.
|
|
+ *
|
|
+ * This program is distributed in the hope that it will be useful,
|
|
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
+ * GNU General Public License for more details.
|
|
+ *
|
|
+ * You should have received a copy of the GNU General Public License
|
|
+ * along with this program; if not, write to the Free Software
|
|
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
|
+ */
|
|
+
|
|
+#ifndef __PLAT_CBUS_H
|
|
+#define __PLAT_CBUS_H
|
|
+
|
|
+#define CBUS_RETU_DEVICE_ID 0x01
|
|
+#define CBUS_TAHVO_DEVICE_ID 0x02
|
|
+
|
|
+struct cbus_host_platform_data {
|
|
+ int dat_gpio;
|
|
+ int clk_gpio;
|
|
+ int sel_gpio;
|
|
+};
|
|
+
|
|
+struct cbus_retu_platform_data {
|
|
+ int irq_base;
|
|
+ int irq_end;
|
|
+ int devid;
|
|
+};
|
|
+
|
|
+#endif /* __PLAT_CBUS_H */
|
|
--- a/arch/arm/plat-omap/include/plat/irqs.h
|
|
+++ b/arch/arm/plat-omap/include/plat/irqs.h
|
|
@@ -411,7 +411,20 @@
|
|
#define TWL_IRQ_END TWL6030_IRQ_END
|
|
#endif
|
|
|
|
-#define NR_IRQS TWL_IRQ_END
|
|
+/* GPMC related */
|
|
+#define OMAP_GPMC_IRQ_BASE (TWL_IRQ_END)
|
|
+#define OMAP_GPMC_NR_IRQS 7
|
|
+#define OMAP_GPMC_IRQ_END (OMAP_GPMC_IRQ_BASE + OMAP_GPMC_NR_IRQS)
|
|
+
|
|
+#define CBUS_RETU_IRQ_BASE OMAP_GPMC_IRQ_END
|
|
+#ifdef CONFIG_CBUS_RETU
|
|
+#define CBUS_RETU_NR_IRQS 16
|
|
+#else
|
|
+#define CBUS_RETU_NR_IRQS 0
|
|
+#endif
|
|
+#define CBUS_RETU_IRQ_END (CBUS_RETU_IRQ_BASE + CBUS_RETU_NR_IRQS)
|
|
+
|
|
+#define NR_IRQS CBUS_RETU_IRQ_END
|
|
|
|
#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32))
|
|
|
|
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
|
|
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
|
|
@@ -673,6 +673,7 @@ static struct omap_hwmod_ocp_if *omap242
|
|
|
|
static struct omap_hwmod omap2420_gpio1_hwmod = {
|
|
.name = "gpio1",
|
|
+ .flags = HWMOD_INIT_NO_RESET, /* Workaround: Don't reset the n810 MIPID */
|
|
.mpu_irqs = omap242x_gpio1_irqs,
|
|
.mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio1_irqs),
|
|
.main_clk = "gpios_fck",
|