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05c930e80a
attention: if caches enabled the network is broken attention: the network of the flash image doesn't work because of enabled caches git-svn-id: svn://svn.openwrt.org/openwrt/trunk@20606 3c298f89-4303-0410-b956-a3cf2f4a3e73
68 lines
1.4 KiB
C
68 lines
1.4 KiB
C
/*
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* (C) Copyright 2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/ar9.h>
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ulong ifx_get_ddr_hz(void)
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{
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switch((*AR9_CGU_SYS) & 0x05) {
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case 0x01:
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case 0x05:
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return CLOCK_111M;
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case 0x00:
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case 0x04:
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return CLOCK_166M;
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}
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return 0;
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}
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ulong ifx_get_cpuclk(void)
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{
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switch((*AR9_CGU_SYS) & 0x05) {
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case 0x00:
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case 0x01:
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return CLOCK_333M;
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case 0x04:
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return CLOCK_166M;
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case 0x05:
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return CLOCK_111M;
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}
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return 0;
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}
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ulong get_bus_freq(ulong dummy)
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{
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unsigned int ddr_clock=ifx_get_ddr_hz();
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if((*AR9_CGU_SYS) & 0x40){
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return ddr_clock/2;
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} else {
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return ddr_clock;
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}
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}
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