mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-01 22:28:26 +02:00
dc3d3f1c49
it's basically also provided by ingenic and nativly based on 2.6.27, adjusted to fit into the OpenWrt-environment
113 lines
3.6 KiB
C
113 lines
3.6 KiB
C
/*
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* linux/include/asm-mips/mach-jz4750d/board-cetus.h
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*
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* JZ4750D-based CETUS board ver 1.x definition.
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*
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* Copyright (C) 2008 Ingenic Semiconductor Inc.
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*
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* Author: <cwjia@ingenic.cn>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_JZ4750D_CETUS_H__
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#define __ASM_JZ4750D_CETUS_H__
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/*======================================================================
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* Frequencies of on-board oscillators
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*/
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#define JZ_EXTAL 24000000
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#define JZ_EXTAL2 32768 /* RTC extal freq: 32.768 KHz */
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//#define CFG_DIV 1 /* hclk=pclk=mclk=CFG_EXTAL/CFG_DIV, just for FPGA board */
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/*======================================================================
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* GPIO
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*/
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#define GPIO_DISP_OFF_N (32*4+18) /* SDATO */
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#define GPIO_SD0_VCC_EN_N (32*4+0) /* CIM_D0 */
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#define GPIO_SD0_CD_N (32*4+1) /* CIM_D1 */
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#define GPIO_SD0_WP (32*4+2) /* CIM_D2 */
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#define GPIO_SD1_VCC_EN_N (32*4+3) /* CIM_D3 */
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#define GPIO_SD1_CD_N (32*4+4) /* CIM_D4 */
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#define GPIO_USB_DETE (32*4+6) /* CIM_D6 */
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#define GPIO_DC_DETE_N (32*4+8) /* CIM_MCLK */
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#define GPIO_CHARG_STAT_N (32*4+10) /* CHARG_DET_N, CIM_VSYNC */
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#define GPIO_LCD_VCC_EN_N (32*4+19) /* SDATI */
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#define GPIO_LCD_PWM (32*4+22) /* GPE22 PWM2 */
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#define GPIO_UDC_HOTPLUG GPIO_USB_DETE
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#define GPIO_AMPEN_N (32*4+5)
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/*====================================================================
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* GPIO KEYS and ADKEYS
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*/
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#define GPIO_HOME (32*5+12) // SW4-GPF12 SSI_DR
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#define GPIO_MENU (32*2+31) // SW2-GPC31 boot_sel1
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#define GPIO_BACK (32*5+11) // SW3-GPF11 SSI_DT
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#define GPIO_CALL (32*5+10) // SW5-GPF10 SSI_CLK
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#define GPIO_ENDCALL (32*4+7) // SW6-GPE7 CIM_D7
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#define GPIO_SW10 (32*4+25) // SW10-GPE25 UART1_TXD
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#define GPIO_ADKEY_INT (32*4+11) // KEY_INT-GPE11 CIM_HSYNC
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/*====================================================================
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* ADKEYS LEVEL
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*/
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#define DPAD_LEFT_LEVEL 869 //0.7V, 225=0.18105/3.3*4096
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#define DPAD_DOWN_LEVEL 1986 //1.6V
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#define DPAD_UP_LEVEL 2482 //2.0V
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#define DPAD_CENTER_LEVEL 1489 //1.2V
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#define DPAD_RIGHT_LEVEL 186 //0.15V
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/*======================================================================
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* Analog input for VBAT is the battery voltage divided by CFG_PBAT_DIV.
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*/
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#define CFG_PBAT_DIV 1
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/*======================================================================
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* MMC/SD
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*/
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#define MSC0_WP_PIN GPIO_SD0_WP
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#define MSC0_HOTPLUG_PIN GPIO_SD0_CD_N
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#define MSC0_HOTPLUG_IRQ (IRQ_GPIO_0 + GPIO_SD0_CD_N)
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#define MSC1_WP_PIN GPIO_SD1_WP
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#define MSC1_HOTPLUG_PIN GPIO_SD1_CD_N
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#define MSC1_HOTPLUG_IRQ (IRQ_GPIO_0 + GPIO_SD1_CD_N)
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/*======================================================================
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* LCD backlight
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*/
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#define LCD_PWM_CHN 2 /* pwm channel */
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#define LCD_PWM_FULL 256
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/* 100 level: 0,1,...,100 */
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#define __lcd_set_backlight_level(n) \
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do { \
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__gpio_as_output(GPIO_LCD_PWM); \
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__gpio_set_pin(GPIO_LCD_PWM); \
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} while (0)
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#define __lcd_close_backlight() \
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do { \
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__gpio_as_output(GPIO_LCD_PWM); \
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__gpio_clear_pin(GPIO_LCD_PWM); \
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} while (0)
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/*
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* The GPIO interrupt pin is low voltage or fall edge acitve
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*/
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#define ACTIVE_LOW_HOME 1
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#define ACTIVE_LOW_MENU 1
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#define ACTIVE_LOW_BACK 1
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#define ACTIVE_LOW_CALL 1
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#define ACTIVE_LOW_ENDCALL 1
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#define ACTIVE_LOW_SW10 1
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#define ACTIVE_LOW_ADKEY 1
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#define ACTIVE_LOW_MSC0_CD 1 /* work when GPIO_SD0_CD_N = 0 */
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#define ACTIVE_LOW_MSC1_CD 1 /* work when GPIO_SD1_CD_N = 0 */
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#endif /* __ASM_JZ4750d_CETUS_H__ */
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