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971ed3b67d
Update enetswith driver with latest fixes and additions. Signed-off-by: Jonas Gorski <jonas.gorski+openwrt@gmail.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32921 3c298f89-4303-0410-b956-a3cf2f4a3e73
104 lines
3.0 KiB
Diff
104 lines
3.0 KiB
Diff
From f1c1bfa89cdac76a215d0e21161da9f8f8373437 Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jonas.gorski@gmail.com>
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Date: Tue, 14 Jun 2011 21:14:39 +0200
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Subject: [PATCH 40/84] MIPS: BCM63XX: add support for BCM6328 in bcm_enetsw
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Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
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---
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arch/mips/bcm63xx/clk.c | 34 ++++++++++++++-----
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arch/mips/bcm63xx/dev-enet.c | 9 +++--
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.../include/asm/mach-bcm63xx/bcm63xx_dev_enet.h | 1 +
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3 files changed, 32 insertions(+), 12 deletions(-)
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--- a/arch/mips/bcm63xx/clk.c
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+++ b/arch/mips/bcm63xx/clk.c
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@@ -118,21 +118,37 @@ static struct clk clk_ephy = {
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*/
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static void enetsw_set(struct clk *clk, int enable)
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{
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- if (!BCMCPU_IS_6368())
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+ u32 mask;
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+
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+ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6368())
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return;
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- bcm_hwclock_set(CKCTL_6368_ROBOSW_EN |
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- CKCTL_6368_SWPKT_USB_EN |
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- CKCTL_6368_SWPKT_SAR_EN, enable);
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+
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+ if (BCMCPU_IS_6328())
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+ mask = CKCTL_6328_ROBOSW_EN;
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+ else
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+ mask = CKCTL_6368_ROBOSW_EN | CKCTL_6368_SWPKT_USB_EN |
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+ CKCTL_6368_SWPKT_SAR_EN;
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+
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+ bcm_hwclock_set(mask, enable);
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if (enable) {
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+ u32 reg;
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u32 val;
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+ if (BCMCPU_IS_6328()) {
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+ reg = PERF_SOFTRESET_6328_REG;
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+ mask = SOFTRESET_6328_ENETSW_MASK;
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+ } else {
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+ reg = PERF_SOFTRESET_6368_REG;
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+ mask = SOFTRESET_6368_ENETSW_MASK;
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+ }
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+
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/* reset switch core afer clock change */
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- val = bcm_perf_readl(PERF_SOFTRESET_6368_REG);
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- val &= ~SOFTRESET_6368_ENETSW_MASK;
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- bcm_perf_writel(val, PERF_SOFTRESET_6368_REG);
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+ val = bcm_perf_readl(reg);
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+ val &= ~mask;
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+ bcm_perf_writel(val, reg);
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msleep(10);
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- val |= SOFTRESET_6368_ENETSW_MASK;
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- bcm_perf_writel(val, PERF_SOFTRESET_6368_REG);
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+ val |= mask;
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+ bcm_perf_writel(val, reg);
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msleep(10);
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}
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}
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--- a/arch/mips/bcm63xx/dev-enet.c
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+++ b/arch/mips/bcm63xx/dev-enet.c
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@@ -141,7 +141,7 @@ static int __init register_shared(void)
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shared_res[0].end = shared_res[0].start;
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shared_res[0].end += (RSET_ENETDMA_SIZE) - 1;
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- if (BCMCPU_IS_6368())
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+ if (BCMCPU_IS_6328() || BCMCPU_IS_6368())
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chan_count = 32;
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else
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chan_count = 16;
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@@ -224,7 +224,7 @@ bcm63xx_enetsw_register(const struct bcm
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{
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int ret;
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- if (!BCMCPU_IS_6368())
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+ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6368())
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return -ENODEV;
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ret = register_shared();
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@@ -241,7 +241,10 @@ bcm63xx_enetsw_register(const struct bcm
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memcpy(bcm63xx_enetsw_device.dev.platform_data, pd, sizeof (*pd));
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- enetsw_pd.num_ports = ENETSW_PORTS_6368;
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+ if (BCMCPU_IS_6328())
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+ enetsw_pd.num_ports = ENETSW_PORTS_6328;
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+ else if (BCMCPU_IS_6368())
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+ enetsw_pd.num_ports = ENETSW_PORTS_6368;
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ret = platform_device_register(&bcm63xx_enetsw_device);
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if (ret)
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--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
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+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
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@@ -43,6 +43,7 @@ struct bcm63xx_enet_platform_data {
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* on board ethernet switch platform data
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*/
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#define ENETSW_MAX_PORT 6
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+#define ENETSW_PORTS_6328 5 /* 4 FE PHY + 1 RGMII */
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#define ENETSW_PORTS_6368 6 /* 4 FE PHY + 2 RGMII */
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#define ENETSW_RGMII_PORT0 4
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