mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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4f72aeefd8
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31336 3c298f89-4303-0410-b956-a3cf2f4a3e73
150 lines
3.8 KiB
Diff
150 lines
3.8 KiB
Diff
From c02c17b2d2bd9663ded7e9f59d6ef24fba239b33 Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Mon, 12 Mar 2012 15:23:39 +0100
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Subject: [PATCH 34/70] MIPS: lantiq: add additional soc ids
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---
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.../mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 38 +++++++++++++++----
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arch/mips/lantiq/xway/prom.c | 35 ++++++++++++++++--
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2 files changed, 61 insertions(+), 12 deletions(-)
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--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
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+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
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@@ -17,20 +17,32 @@
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#define SOC_ID_DANUBE1 0x129
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#define SOC_ID_DANUBE2 0x12B
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#define SOC_ID_TWINPASS 0x12D
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-#define SOC_ID_AMAZON_SE 0x152
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+#define SOC_ID_AMAZON_SE_1 0x152 /* 50601 */
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+#define SOC_ID_AMAZON_SE_2 0x153 /* 50600 */
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#define SOC_ID_ARX188 0x16C
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-#define SOC_ID_ARX168 0x16D
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+#define SOC_ID_ARX168_1 0x16D
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+#define SOC_ID_ARX168_2 0x16E
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#define SOC_ID_ARX182 0x16F
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-#define SOC_ID_VRX288 0x1C0 /* VRX288 v1.1 */
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-#define SOC_ID_VRX268 0x1C2 /* VRX268 v1.1 */
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-#define SOC_ID_GRX288 0x1C9 /* GRX288 v1.1 */
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+#define SOC_ID_GRX188 0x170
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+#define SOC_ID_GRX168 0x171
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+
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+#define SOC_ID_VRX288 0x1C0 /* v1.1 */
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+#define SOC_ID_VRX282 0x1C1 /* v1.1 */
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+#define SOC_ID_VRX268 0x1C2 /* v1.1 */
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+#define SOC_ID_GRX268 0x1C8 /* v1.1 */
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+#define SOC_ID_GRX288 0x1C9 /* v1.1 */
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+#define SOC_ID_VRX288_2 0x00B /* v1.2 */
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+#define SOC_ID_VRX268_2 0x00C /* v1.2 */
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+#define SOC_ID_GRX288_2 0x00D /* v1.2 */
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+#define SOC_ID_GRX282_2 0x00E /* v1.2 */
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/* SoC Types */
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#define SOC_TYPE_DANUBE 0x01
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#define SOC_TYPE_TWINPASS 0x02
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#define SOC_TYPE_AR9 0x03
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-#define SOC_TYPE_VR9 0x04
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-#define SOC_TYPE_AMAZON_SE 0x05
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+#define SOC_TYPE_VR9_1 0x04 /* v1.1 */
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+#define SOC_TYPE_VR9_2 0x05 /* v1.2 */
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+#define SOC_TYPE_AMAZON_SE 0x06
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/* ASC0/1 - serial port */
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#define LTQ_ASC0_BASE_ADDR 0x1E100400
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@@ -149,9 +161,19 @@ static inline int ltq_is_ar9(void)
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return (ltq_get_soc_type() == SOC_TYPE_AR9);
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}
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+static inline int ltq_is_vr9_1(void)
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+{
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+ return (ltq_get_soc_type() == SOC_TYPE_VR9_1);
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+}
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+
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+static inline int ltq_is_vr9_2(void)
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+{
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+ return (ltq_get_soc_type() == SOC_TYPE_VR9_2);
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+}
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+
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static inline int ltq_is_vr9(void)
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{
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- return (ltq_get_soc_type() == SOC_TYPE_VR9);
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+ return (ltq_is_vr9_1() || ltq_is_vr9_2());
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}
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static inline int ltq_is_falcon(void)
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--- a/arch/mips/lantiq/xway/prom.c
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+++ b/arch/mips/lantiq/xway/prom.c
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@@ -18,7 +18,9 @@
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#define SOC_DANUBE "Danube"
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#define SOC_TWINPASS "Twinpass"
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+#define SOC_AMAZON_SE "Amazon_SE"
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#define SOC_AR9 "AR9"
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+#define SOC_GR9 "GR9"
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#define SOC_VR9 "VR9"
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#define PART_SHIFT 12
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@@ -26,7 +28,6 @@
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#define REV_SHIFT 28
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#define REV_MASK 0xF0000000
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-#define SOC_AMAZON_SE "Amazon_SE"
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void __init ltq_soc_detect(struct ltq_soc_info *i)
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{
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@@ -46,13 +47,21 @@ void __init ltq_soc_detect(struct ltq_so
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break;
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case SOC_ID_ARX188:
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- case SOC_ID_ARX168:
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+ case SOC_ID_ARX168_1:
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+ case SOC_ID_ARX168_2:
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case SOC_ID_ARX182:
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i->name = SOC_AR9;
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i->type = SOC_TYPE_AR9;
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break;
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- case SOC_ID_AMAZON_SE:
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+ case SOC_ID_GRX188:
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+ case SOC_ID_GRX168:
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+ i->name = SOC_GR9;
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+ i->type = SOC_TYPE_AR9;
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+ break;
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+
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+ case SOC_ID_AMAZON_SE_1:
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+ case SOC_ID_AMAZON_SE_2:
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i->name = SOC_AMAZON_SE;
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i->type = SOC_TYPE_AMAZON_SE;
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#ifdef CONFIG_PCI
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@@ -60,12 +69,30 @@ void __init ltq_soc_detect(struct ltq_so
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#endif
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break;
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+ case SOC_ID_VRX282:
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case SOC_ID_VRX268:
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case SOC_ID_VRX288:
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i->name = SOC_VR9;
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- i->type = SOC_TYPE_VR9;
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+ i->type = SOC_TYPE_VR9_1;
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break;
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+ case SOC_ID_GRX268:
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+ case SOC_ID_GRX288:
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+ i->name = SOC_GR9;
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+ i->type = SOC_TYPE_VR9_1;
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+ break;
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+
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+ case SOC_ID_VRX268_2:
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+ case SOC_ID_VRX288_2:
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+ i->name = SOC_VR9;
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+ i->type = SOC_TYPE_VR9_2;
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+ break;
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+
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+ case SOC_ID_GRX282_2:
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+ case SOC_ID_GRX288_2:
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+ i->name = SOC_GR9;
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+ i->type = SOC_TYPE_VR9_2;
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+
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default:
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unreachable();
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break;
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