1
0
mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-12-31 00:52:05 +02:00
openwrt-xburst/target/linux/lantiq/patches-3.2/0054-MIPS-lantiq-pci-move-pcibios-code-into-fixup-lantiq..patch
jogo f21c103e5a kernel: update linux 3.2 to 3.2.13 and refresh patches
Also remove a duplicate patch from lantiq (already in generic).

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31158 3c298f89-4303-0410-b956-a3cf2f4a3e73
2012-04-01 07:56:55 +00:00

122 lines
3.5 KiB
Diff

From 49b5d2242091e216736216d98d7f940870d4f1ec Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Thu, 8 Mar 2012 15:53:10 +0100
Subject: [PATCH 54/70] MIPS: lantiq: pci: move pcibios code into
fixup-lantiq.c
---
arch/mips/pci/Makefile | 1 +
arch/mips/pci/fixup-lantiq.c | 42 ++++++++++++++++++++++++++++++++++++++++++
arch/mips/pci/pci-lantiq.c | 24 ++----------------------
3 files changed, 45 insertions(+), 22 deletions(-)
create mode 100644 arch/mips/pci/fixup-lantiq.c
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -40,6 +40,7 @@ obj-$(CONFIG_SIBYTE_SB1250) += fixup-sb1
obj-$(CONFIG_SIBYTE_BCM112X) += fixup-sb1250.o pci-sb1250.o
obj-$(CONFIG_SIBYTE_BCM1x80) += pci-bcm1480.o pci-bcm1480ht.o
obj-$(CONFIG_SNI_RM) += fixup-sni.o ops-sni.o
+obj-$(CONFIG_LANTIQ) += fixup-lantiq.o
obj-$(CONFIG_PCI_LANTIQ) += pci-lantiq.o ops-lantiq.o
obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o
obj-$(CONFIG_TANBAC_TB0226) += fixup-tb0226.o
--- /dev/null
+++ b/arch/mips/pci/fixup-lantiq.c
@@ -0,0 +1,42 @@
+/*
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * Copyright (C) 2012 John Crispin <blogic@openwrt.org>
+ */
+
+#include <linux/of_irq.h>
+#include <linux/of_pci.h>
+
+int (*ltqpci_map_irq)(const struct pci_dev *dev, u8 slot, u8 pin) = NULL;
+int (*ltqpci_plat_arch_init)(struct pci_dev *dev) = NULL;
+int (*ltqpci_plat_dev_init)(struct pci_dev *dev) = NULL;
+int *ltq_pci_irq_map;
+
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ if (ltqpci_plat_arch_init)
+ return ltqpci_plat_arch_init(dev);
+
+ if (ltqpci_plat_dev_init)
+ return ltqpci_plat_dev_init(dev);
+
+ return 0;
+}
+
+int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+ if (ltqpci_map_irq)
+ return ltqpci_map_irq(dev, slot, pin);
+ if (ltq_pci_irq_map[slot]) {
+ dev_info(&dev->dev, "SLOT:%d PIN:%d IRQ:%d\n", slot, pin, ltq_pci_irq_map[slot]);
+ return ltq_pci_irq_map[slot];
+ }
+ printk(KERN_ERR "lq_pci: trying to map irq for unknown slot %d\n",
+ slot);
+
+ return 0;
+}
+
+
--- a/arch/mips/pci/pci-lantiq.c
+++ b/arch/mips/pci/pci-lantiq.c
@@ -93,16 +93,14 @@ static struct ltq_pci_gpio_map ltq_pci_g
{ 37, 2, 0, "pci-req4" },
};
-__iomem void *ltq_pci_mapped_cfg;
+__iomem void *ltq_pci_cfgbase;
static __iomem void *ltq_pci_membase;
-int (*ltqpci_plat_dev_init)(struct pci_dev *dev) = NULL;
-
/* Since the PCI REQ pins can be reused for other functionality, make it
possible to exclude those from interpretation by the PCI controller */
static int ltq_pci_req_mask = 0xf;
-static int *ltq_pci_irq_map;
+extern int *ltq_pci_irq_map;
struct pci_ops ltq_pci_ops = {
.read = ltq_pci_read_config_dword,
@@ -131,14 +129,6 @@ static struct pci_controller ltq_pci_con
.io_offset = 0x00000000UL,
};
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
- if (ltqpci_plat_dev_init)
- return ltqpci_plat_dev_init(dev);
-
- return 0;
-}
-
static u32 ltq_calc_bar11mask(void)
{
u32 mem, bar11mask;
@@ -256,16 +246,6 @@ static int __devinit ltq_pci_startup(str
return 0;
}
-int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
- if (ltq_pci_irq_map[slot])
- return ltq_pci_irq_map[slot];
- printk(KERN_ERR "lq_pci: trying to map irq for unknown slot %d\n",
- slot);
-
- return 0;
-}
-
static int __devinit ltq_pci_probe(struct platform_device *pdev)
{
struct ltq_pci_data *ltq_pci_data =