mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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a8b37809d6
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@10811 3c298f89-4303-0410-b956-a3cf2f4a3e73
137 lines
3.5 KiB
C
137 lines
3.5 KiB
C
#ifndef _ATHEROS_GPIO_H_
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#define _ATHEROS_GPIO_H_
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#include "ar531x.h"
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/* Common AR531X global variables */
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/* extern u32 ar531x_gpio_intr_Mask; */
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/* AR5312 exported routines */
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#ifdef CONFIG_ATHEROS_AR5312
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asmlinkage void ar5312_gpio_irq_dispatch(void);
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#endif
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/* AR5315 exported routines */
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#ifdef CONFIG_ATHEROS_AR5315
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asmlinkage void ar5315_gpio_irq_dispatch(void);
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#endif
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/*
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* Wrappers for the generic GPIO layer
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*/
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/* Sets a gpio to input, or returns ENXIO for non-existent gpio */
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static inline int gpio_direction_input(unsigned gpio) {
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DO_AR5312( if (gpio > AR531X_NUM_GPIO) { \
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return -ENXIO; \
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} else { \
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sysRegWrite(AR531X_GPIO_CR, \
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sysRegRead(AR531X_GPIO_CR) | \
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AR531X_GPIO_CR_I(gpio) ); \
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return 0; \
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} \
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)
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DO_AR5315( if (gpio > AR5315_NUM_GPIO) { \
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return -ENXIO; \
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} else { \
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sysRegWrite(AR5315_GPIO_CR, \
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( sysRegRead(AR5315_GPIO_CR) & \
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~(AR5315_GPIO_CR_M(gpio)) ) | \
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AR5315_GPIO_CR_I(gpio) ); \
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return 0; \
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} \
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)
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return -ENXIO;
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}
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/* Sets a gpio to output with value, or returns ENXIO for non-existent gpio */
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static inline int gpio_direction_output(unsigned gpio, int value) {
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DO_AR5312( if (gpio > AR531X_NUM_GPIO) { \
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return -ENXIO; \
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} else { \
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sysRegWrite(AR531X_GPIO_DO, \
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( (sysRegRead(AR531X_GPIO_DO) & \
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~(1 << gpio) ) | \
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((value!=0) << gpio)) ); \
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sysRegWrite(AR531X_GPIO_CR, \
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( sysRegRead(AR531X_GPIO_CR) & \
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~(AR531X_GPIO_CR_M(gpio)) )); \
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return 0; \
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} \
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)
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DO_AR5315( if (gpio > AR5315_NUM_GPIO) { \
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return -ENXIO; \
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} else { \
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sysRegWrite(AR5315_GPIO_DO, \
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( (sysRegRead(AR5315_GPIO_DO) & \
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~(1 << gpio)) | \
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((value!=0) << gpio)) ); \
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sysRegWrite(AR5315_GPIO_CR, \
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sysRegRead(AR5315_GPIO_CR) | \
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AR5315_GPIO_CR_O(gpio) ); \
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return 0; \
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} \
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)
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return -ENXIO;
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}
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/* Reads the gpio pin. Unchecked function */
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static inline int gpio_get_value(unsigned gpio) {
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DO_AR5312(return (sysRegRead(AR531X_GPIO_DI) & (1 << gpio));)
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DO_AR5315(return (sysRegRead(AR5315_GPIO_DI) & (1 << gpio));)
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return 0;
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}
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/* Writes to the gpio pin. Unchecked function */
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static inline void gpio_set_value(unsigned gpio, int value) {
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DO_AR5312( sysRegWrite(AR531X_GPIO_DO, \
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( (sysRegRead(AR531X_GPIO_DO) & \
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~(1 << gpio)) | \
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((value!=0) << gpio)) ); \
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)
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DO_AR5315( sysRegWrite(AR5315_GPIO_DO, \
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( (sysRegRead(AR5315_GPIO_DO) & \
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~(1 << gpio)) | \
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((value!=0) << gpio)) ); \
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)
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}
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static inline int gpio_request(unsigned gpio, const char *label) {
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return 0;
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}
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static inline void gpio_free(unsigned gpio) {
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}
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/* Returns IRQ to attach for gpio. Unchecked function */
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static inline int gpio_to_irq(unsigned gpio) {
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return AR531X_GPIO_IRQ(gpio);
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}
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/* Returns gpio for IRQ attached. Unchecked function */
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static inline int irq_to_gpio(unsigned irq) {
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return (irq - (AR531X_GPIO_IRQ(0)));
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}
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/* #include <asm-generic/gpio.h> */ /* cansleep wrappers */
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/* platforms that don't directly support access to GPIOs through I2C, SPI,
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* or other blocking infrastructure can use these wrappers.
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*/
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static inline int gpio_cansleep(unsigned gpio) {
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return 0;
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}
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static inline int gpio_get_value_cansleep(unsigned gpio) {
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might_sleep();
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return gpio_get_value(gpio);
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}
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static inline void gpio_set_value_cansleep(unsigned gpio, int value) {
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might_sleep();
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gpio_set_value(gpio, value);
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}
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#endif
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