mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2025-01-29 21:11:05 +02:00
27e94101de
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@27162 3c298f89-4303-0410-b956-a3cf2f4a3e73
331 lines
7.0 KiB
C
331 lines
7.0 KiB
C
/*
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* ADM5120 generic GPIO API support via GPIOLIB
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*
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* Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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*/
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/module.h>
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#include <linux/irq.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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#include <asm/addrspace.h>
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#include <asm/mach-adm5120/adm5120_defs.h>
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#include <asm/mach-adm5120/adm5120_info.h>
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#include <asm/mach-adm5120/adm5120_switch.h>
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#define GPIO_REG(r) (void __iomem *)(KSEG1ADDR(ADM5120_SWITCH_BASE) + r)
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struct gpio1_desc {
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void __iomem *reg; /* register address */
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u8 iv_shift; /* shift amount for input bit */
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u8 mode_shift; /* shift amount for mode bits */
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};
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#define GPIO1_DESC(p, l) { \
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.reg = GPIO_REG(SWITCH_REG_PORT0_LED + ((p) * 4)), \
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.iv_shift = LED0_IV_SHIFT + (l), \
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.mode_shift = (l) * 4 \
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}
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static struct gpio1_desc gpio1_table[15] = {
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GPIO1_DESC(0, 0), GPIO1_DESC(0, 1), GPIO1_DESC(0, 2),
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GPIO1_DESC(1, 0), GPIO1_DESC(1, 1), GPIO1_DESC(1, 2),
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GPIO1_DESC(2, 0), GPIO1_DESC(2, 1), GPIO1_DESC(2, 2),
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GPIO1_DESC(3, 0), GPIO1_DESC(3, 1), GPIO1_DESC(3, 2),
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GPIO1_DESC(4, 0), GPIO1_DESC(4, 1), GPIO1_DESC(4, 2)
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};
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static u32 gpio_conf2;
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int adm5120_gpio_to_irq(unsigned gpio)
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{
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int ret;
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switch (gpio) {
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case ADM5120_GPIO_PIN2:
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ret = ADM5120_IRQ_GPIO2;
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break;
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case ADM5120_GPIO_PIN4:
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ret = ADM5120_IRQ_GPIO4;
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break;
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default:
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ret = -EINVAL;
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break;
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}
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return ret;
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}
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EXPORT_SYMBOL(adm5120_gpio_to_irq);
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int adm5120_irq_to_gpio(unsigned irq)
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{
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int ret;
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switch (irq) {
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case ADM5120_IRQ_GPIO2:
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ret = ADM5120_GPIO_PIN2;
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break;
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case ADM5120_IRQ_GPIO4:
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ret = ADM5120_GPIO_PIN4;
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break;
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default:
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ret = -EINVAL;
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break;
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}
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return ret;
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}
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EXPORT_SYMBOL(adm5120_irq_to_gpio);
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/*
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* Helpers for GPIO lines in GPIO_CONF0 register
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*/
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#define PIN_IM(p) ((1 << GPIO_CONF0_IM_SHIFT) << p)
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#define PIN_IV(p) ((1 << GPIO_CONF0_IV_SHIFT) << p)
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#define PIN_OE(p) ((1 << GPIO_CONF0_OE_SHIFT) << p)
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#define PIN_OV(p) ((1 << GPIO_CONF0_OV_SHIFT) << p)
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int __adm5120_gpio0_get_value(unsigned offset)
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{
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void __iomem **reg;
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u32 t;
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reg = GPIO_REG(SWITCH_REG_GPIO_CONF0);
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t = __raw_readl(reg);
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if ((t & PIN_IM(offset)) != 0)
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t &= PIN_IV(offset);
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else
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t &= PIN_OV(offset);
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return (t) ? 1 : 0;
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}
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EXPORT_SYMBOL(__adm5120_gpio0_get_value);
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void __adm5120_gpio0_set_value(unsigned offset, int value)
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{
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void __iomem **reg;
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u32 t;
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reg = GPIO_REG(SWITCH_REG_GPIO_CONF0);
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t = __raw_readl(reg);
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if (value == 0)
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t &= ~(PIN_OV(offset));
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else
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t |= PIN_OV(offset);
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__raw_writel(t, reg);
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}
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EXPORT_SYMBOL(__adm5120_gpio0_set_value);
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static int adm5120_gpio0_get_value(struct gpio_chip *chip, unsigned offset)
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{
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return __adm5120_gpio0_get_value(offset);
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}
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static void adm5120_gpio0_set_value(struct gpio_chip *chip,
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unsigned offset, int value)
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{
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__adm5120_gpio0_set_value(offset, value);
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}
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static int adm5120_gpio0_direction_input(struct gpio_chip *chip,
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unsigned offset)
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{
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void __iomem **reg;
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u32 t;
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reg = GPIO_REG(SWITCH_REG_GPIO_CONF0);
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t = __raw_readl(reg);
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t &= ~(PIN_OE(offset));
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t |= PIN_IM(offset);
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__raw_writel(t, reg);
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return 0;
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}
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static int adm5120_gpio0_direction_output(struct gpio_chip *chip,
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unsigned offset, int value)
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{
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void __iomem **reg;
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u32 t;
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reg = GPIO_REG(SWITCH_REG_GPIO_CONF0);
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t = __raw_readl(reg);
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t &= ~(PIN_IM(offset) | PIN_OV(offset));
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t |= PIN_OE(offset);
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if (value)
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t |= PIN_OV(offset);
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__raw_writel(t, reg);
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return 0;
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}
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static struct gpio_chip adm5120_gpio0_chip = {
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.label = "adm5120 gpio0",
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.get = adm5120_gpio0_get_value,
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.set = adm5120_gpio0_set_value,
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.direction_input = adm5120_gpio0_direction_input,
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.direction_output = adm5120_gpio0_direction_output,
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.base = ADM5120_GPIO_PIN0,
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.ngpio = ADM5120_GPIO_PIN7 - ADM5120_GPIO_PIN0 + 1,
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};
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int __adm5120_gpio1_get_value(unsigned offset)
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{
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void __iomem **reg;
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u32 t, m;
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reg = gpio1_table[offset].reg;
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t = __raw_readl(reg);
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m = (t >> gpio1_table[offset].mode_shift) & LED_MODE_MASK;
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if (m == LED_MODE_INPUT)
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return (t >> gpio1_table[offset].iv_shift) & 1;
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if (m == LED_MODE_OUT_LOW)
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return 0;
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return 1;
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}
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EXPORT_SYMBOL(__adm5120_gpio1_get_value);
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void __adm5120_gpio1_set_value(unsigned offset, int value)
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{
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void __iomem **reg;
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u32 t, s;
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reg = gpio1_table[offset].reg;
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s = gpio1_table[offset].mode_shift;
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t = __raw_readl(reg);
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t &= ~(LED_MODE_MASK << s);
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switch (value) {
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case ADM5120_GPIO_LOW:
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t |= (LED_MODE_OUT_LOW << s);
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break;
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case ADM5120_GPIO_FLASH:
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case ADM5120_GPIO_LINK:
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case ADM5120_GPIO_SPEED:
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case ADM5120_GPIO_DUPLEX:
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case ADM5120_GPIO_ACT:
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case ADM5120_GPIO_COLL:
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case ADM5120_GPIO_LINK_ACT:
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case ADM5120_GPIO_DUPLEX_COLL:
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case ADM5120_GPIO_10M_ACT:
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case ADM5120_GPIO_100M_ACT:
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t |= ((value & LED_MODE_MASK) << s);
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break;
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default:
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t |= (LED_MODE_OUT_HIGH << s);
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break;
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}
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__raw_writel(t, reg);
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}
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EXPORT_SYMBOL(__adm5120_gpio1_set_value);
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static int adm5120_gpio1_get_value(struct gpio_chip *chip, unsigned offset)
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{
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return __adm5120_gpio1_get_value(offset);
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}
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static void adm5120_gpio1_set_value(struct gpio_chip *chip,
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unsigned offset, int value)
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{
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__adm5120_gpio1_set_value(offset, value);
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}
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static int adm5120_gpio1_direction_input(struct gpio_chip *chip,
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unsigned offset)
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{
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void __iomem **reg;
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u32 t;
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reg = gpio1_table[offset].reg;
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t = __raw_readl(reg);
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t &= ~(LED_MODE_MASK << gpio1_table[offset].mode_shift);
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__raw_writel(t, reg);
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return 0;
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}
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static int adm5120_gpio1_direction_output(struct gpio_chip *chip,
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unsigned offset, int value)
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{
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__adm5120_gpio1_set_value(offset, value);
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return 0;
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}
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static struct gpio_chip adm5120_gpio1_chip = {
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.label = "adm5120 gpio1",
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.get = adm5120_gpio1_get_value,
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.set = adm5120_gpio1_set_value,
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.direction_input = adm5120_gpio1_direction_input,
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.direction_output = adm5120_gpio1_direction_output,
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.base = ADM5120_GPIO_P0L0,
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.ngpio = ADM5120_GPIO_P4L2 - ADM5120_GPIO_P0L0 + 1,
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};
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void __init adm5120_gpio_csx0_enable(void)
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{
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gpio_conf2 |= GPIO_CONF2_CSX0;
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SW_WRITE_REG(SWITCH_REG_GPIO_CONF2, gpio_conf2);
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gpio_request(ADM5120_GPIO_PIN1, "CSX0");
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}
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void __init adm5120_gpio_csx1_enable(void)
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{
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gpio_conf2 |= GPIO_CONF2_CSX1;
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SW_WRITE_REG(SWITCH_REG_GPIO_CONF2, gpio_conf2);
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gpio_request(ADM5120_GPIO_PIN3, "CSX1");
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}
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void __init adm5120_gpio_ew_enable(void)
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{
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gpio_conf2 |= GPIO_CONF2_EW;
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SW_WRITE_REG(SWITCH_REG_GPIO_CONF2, gpio_conf2);
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gpio_request(ADM5120_GPIO_PIN0, "EW");
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}
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void __init adm5120_gpio_init(void)
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{
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int err;
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SW_WRITE_REG(SWITCH_REG_GPIO_CONF2, gpio_conf2);
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if (adm5120_package_pqfp()) {
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gpiochip_reserve(ADM5120_GPIO_PIN4, 4);
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adm5120_gpio0_chip.ngpio = 4;
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}
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err = gpiochip_add(&adm5120_gpio0_chip);
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if (err)
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panic("cannot add ADM5120 GPIO0 chip, error=%d", err);
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err = gpiochip_add(&adm5120_gpio1_chip);
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if (err)
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panic("cannot add ADM5120 GPIO1 chip, error=%d", err);
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}
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