mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-26 09:23:19 +02:00
f3bcdcf9ed
Allow for each lantiq target (without wifi eeprom) to define where wireless configuration data is on flash. Patch also adds support for sx763 lantiq target. Signed-off-by: Luka Perkov <openwrt@lukaperkov.net> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@27662 3c298f89-4303-0410-b956-a3cf2f4a3e73
96 lines
2.3 KiB
Diff
96 lines
2.3 KiB
Diff
--- a/ath_hal/ah_os.c
|
|
+++ b/ath_hal/ah_os.c
|
|
@@ -343,6 +343,46 @@ EXPORT_SYMBOL(ath_hal_func);
|
|
* NB: see the comments in ah_osdep.h about byte-swapping register
|
|
* reads and writes to understand what's going on below.
|
|
*/
|
|
+
|
|
+#ifdef CONFIG_LANTIQ
|
|
+extern int lantiq_emulate_madwifi_eep;
|
|
+extern unsigned long long lantiq_madwifi_eep_addr;
|
|
+#define EEPROM_EMULATION 1
|
|
+#endif
|
|
+
|
|
+#ifdef EEPROM_EMULATION
|
|
+static int ath_hal_eeprom(struct ath_hal *ah, unsigned long addr, int val, int write)
|
|
+{
|
|
+ static int addrsel = 0;
|
|
+ static int rc = 0;
|
|
+
|
|
+ if (write) {
|
|
+ if(addr == 0x6000) {
|
|
+ addrsel = val * 2;
|
|
+ rc = 0;
|
|
+ }
|
|
+ } else {
|
|
+ switch(addr)
|
|
+ {
|
|
+ case 0x600c:
|
|
+ if(rc++ < 2)
|
|
+ val = 0x00000000;
|
|
+ else
|
|
+ val = 0x00000002;
|
|
+ break;
|
|
+ case 0x6004:
|
|
+ val = cpu_to_le16(__raw_readw((u16 *) KSEG1ADDR(lantiq_madwifi_eep_addr + addrsel)));
|
|
+ /* this forces the regdomain to 0x00 (worldwide), as the original setting
|
|
+ * causes issues with the HAL */
|
|
+ if (addrsel == 0x17e)
|
|
+ val = 0;
|
|
+ break;
|
|
+ }
|
|
+ }
|
|
+ return val;
|
|
+}
|
|
+#endif
|
|
+
|
|
void __ahdecl
|
|
ath_hal_reg_write(struct ath_hal *ah, u_int reg, u_int32_t val)
|
|
{
|
|
@@ -351,20 +391,33 @@ ath_hal_reg_write(struct ath_hal *ah, u_
|
|
ath_hal_printf(ah, "%s: WRITE 0x%x <= 0x%x\n",
|
|
(ath_hal_func ?: "unknown"), reg, val);
|
|
#endif
|
|
- _OS_REG_WRITE(ah, reg, val);
|
|
+#ifdef EEPROM_EMULATION
|
|
+ if((reg >= 0x6000) && (reg <= 0x6010) && lantiq_emulate_madwifi_eep)
|
|
+ {
|
|
+ val = ath_hal_eeprom(ah, reg, val, 1);
|
|
+ } else
|
|
+#endif
|
|
+ _OS_REG_WRITE(ah, reg, val);
|
|
}
|
|
EXPORT_SYMBOL(ath_hal_reg_write);
|
|
|
|
+
|
|
/* This should only be called while holding the lock, sc->sc_hal_lock. */
|
|
u_int32_t __ahdecl
|
|
ath_hal_reg_read(struct ath_hal *ah, u_int reg)
|
|
{
|
|
- u_int32_t val;
|
|
+ u_int32_t val;
|
|
+#ifdef EEPROM_EMULATION
|
|
+ if((reg >= 0x6000) && (reg <= 0x6010) && lantiq_emulate_madwifi_eep)
|
|
+ {
|
|
+ val = ath_hal_eeprom(ah, reg, 0, 0);
|
|
+ } else
|
|
+#endif
|
|
+ val = _OS_REG_READ(ah, reg);
|
|
|
|
- val = _OS_REG_READ(ah, reg);
|
|
#ifdef AH_DEBUG
|
|
if (ath_hal_debug > 1)
|
|
- ath_hal_printf(ah, "%s: READ 0x%x => 0x%x\n",
|
|
+ ath_hal_printf(ah, "%s: READ 0x%x => 0x%x\n",
|
|
(ath_hal_func ?: "unknown"), reg, val);
|
|
#endif
|
|
return val;
|
|
@@ -581,7 +634,6 @@ init_ath_hal(void)
|
|
{
|
|
const char *sep;
|
|
int i;
|
|
-
|
|
printk(KERN_INFO "%s: %s (", dev_info, ath_hal_version);
|
|
sep = "";
|
|
for (i = 0; ath_hal_buildopts[i] != NULL; i++) {
|