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1a29ef8e97
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@19815 3c298f89-4303-0410-b956-a3cf2f4a3e73
187 lines
4.8 KiB
C
187 lines
4.8 KiB
C
/*
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* arch/ubicom32/include/asm/ldsr.h
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* Ubicom32 LDSR interface definitions.
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*
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* (C) Copyright 2009, Ubicom, Inc.
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*
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* This file is part of the Ubicom32 Linux Kernel Port.
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*
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* The Ubicom32 Linux Kernel Port is free software: you can redistribute
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* it and/or modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, either version 2 of the
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* License, or (at your option) any later version.
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*
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* The Ubicom32 Linux Kernel Port is distributed in the hope that it
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* will be useful, but WITHOUT ANY WARRANTY; without even the implied
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* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
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* the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with the Ubicom32 Linux Kernel Port. If not,
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* see <http://www.gnu.org/licenses/>.
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*
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* Ubicom32 implementation derived from (with many thanks):
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* arch/m68knommu
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* arch/blackfin
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* arch/parisc
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*/
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#ifndef _ASM_UBICOM32_LDSR_H
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#define _ASM_UBICOM32_LDSR_H
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#include <asm/ubicom32-common.h>
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#include <asm/types.h>
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#include <asm/thread.h>
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extern unsigned int ldsr_soft_irq_mask;
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/*
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* ldsr_local_irq_is_disabled()
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* Test if interrupts are disabled for this thread?
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*/
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static inline int ldsr_local_irq_is_disabled(void)
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{
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int ret;
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thread_t self = thread_get_self();
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unsigned int mask = (1 << self);
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asm volatile (
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" and.4 %0, scratchpad1, %1 \n\t"
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: "=r" (ret)
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: "d" (mask)
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: "cc"
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);
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/*
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* We return a simple 1 == disabled, 0 == enabled
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* losing which tid this is for, because Linux
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* can restore interrupts on a different thread.
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*/
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return ret >> self;
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}
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/*
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* ldsr_local_irq_save()
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* Get the current interrupt state and disable interrupts.
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*/
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static inline unsigned int ldsr_local_irq_save(void)
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{
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int ret;
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thread_t self = thread_get_self();
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unsigned int mask = (1 << self);
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/*
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* Ensure the compiler can not optimize out the code
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* (volatile) and that it does not "cache" values around
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* the interrupt state change (memory). This ensures
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* that interrupt changes are treated as a critical
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* section.
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*/
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asm volatile (
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" and.4 %0, scratchpad1, %1 \n\t"
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" or.4 scratchpad1, scratchpad1, %1 \n\t"
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: "=&r" (ret)
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: "d" (mask)
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: "cc", "memory"
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);
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/*
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* We return a simple 1 == disabled, 0 == enabled
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* losing which tid this is for, because Linux
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* can restore interrupts on a different thread.
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*/
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return ret >> self;
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}
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/*
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* ldsr_local_irq_restore()
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* Restore this cpu's interrupt enable/disable state.
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*
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* Note: flags is either 0 or 1.
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*/
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static inline void ldsr_local_irq_restore(unsigned int flags)
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{
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unsigned int temp;
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thread_t self = thread_get_self();
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unsigned int mask = (1 << self);
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flags = (flags << self);
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/*
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* Ensure the compiler can not optimize out the code
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* (volatile) and that it does not "cache" values around
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* the interrupt state change (memory). This ensures
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* that interrupt changes are treated as a critical
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* section.
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*
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* Atomic change to our bit in scratchpad1 without
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* causing any temporary glitch in the value and
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* without effecting other values. Also this uses
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* no branches so no penalties.
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*/
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asm volatile (
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" xor.4 %0, scratchpad1, %1 \n\t"
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" and.4 %0, %2, %0 \n\t"
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" xor.4 scratchpad1, scratchpad1, %0 \n\t"
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" move.4 int_set0, %3 \n\t"
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: "=&d"(temp)
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: "d"(flags), "r"(mask), "r"(ldsr_soft_irq_mask)
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: "cc", "memory"
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);
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}
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/*
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* ldsr_local_irq_disable_interrupt()
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* Disable ints for this thread.
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*/
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static inline void ldsr_local_irq_disable(void)
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{
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unsigned int mask = (1 << thread_get_self());
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/*
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* Ensure the compiler can not optimize out the code
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* (volatile) and that it does not "cache" values around
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* the interrupt state change (memory). This ensures
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* that interrupt changes are treated as a critical
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* section.
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*/
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asm volatile (
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" or.4 scratchpad1, scratchpad1, %0 \n\t"
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:
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: "d" (mask)
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: "cc", "memory"
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);
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}
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/*
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* ldsr_local_irq_enable_interrupt
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* Enable ints for this thread.
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*/
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static inline void ldsr_local_irq_enable(void)
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{
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unsigned int mask = (1 << thread_get_self());
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/*
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* Ensure the compiler can not optimize out the code
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* (volatile) and that it does not "cache" values around
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* the interrupt state change (memory). This ensures
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* that interrupt changes are treated as a critical
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* section.
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*/
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asm volatile (
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" and.4 scratchpad1, scratchpad1, %0 \n\t"
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" move.4 int_set0, %1 \n\t"
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:
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: "d" (~mask), "r" (ldsr_soft_irq_mask)
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: "cc", "memory"
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);
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}
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extern void ldsr_init(void);
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extern void ldsr_set_trap_irq(unsigned int irq);
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extern void ldsr_mask_vector(unsigned int vector);
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extern void ldsr_unmask_vector(unsigned int vector);
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extern void ldsr_enable_vector(unsigned int vector);
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extern void ldsr_disable_vector(unsigned int vector);
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extern thread_t ldsr_get_threadid(void);
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#endif /* _ASM_UBICOM32_LDSR_H */
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