mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-14 18:38:10 +02:00
7bc411c5d9
mtd_speedtest results:
page read speed
old new delta
DB120 929 KiB/s 2597 KiB/s +179.55%
TL-WR1043ND v1 754 KiB/s 2166 KiB/s +187.27%
TL-WR703N v1 745 KiB/s 2176 KiB/s +192.08%
TL-MR3220 v1 752 KiB/s 2154 KiB/s +186.44%
TL-WR2543ND v1 564 KiB/s 2130 KiB/s +277.66%
TL-WR741ND v2 525 KiB/s 1767 KiB/s +236.57%
ALFA-AP96 702 KiB/s 1977 KiB/s +181.62%
WNDR3700 697 KiB/s 1965 KiB/s +181.92%
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31118 3c298f89-4303-0410-b956-a3cf2f4a3e73
186 lines
4.6 KiB
Diff
186 lines
4.6 KiB
Diff
--- a/drivers/spi/spi-ath79.c
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+++ b/drivers/spi/spi-ath79.c
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@@ -37,6 +37,11 @@
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#define ATH79_SPI_CS_LINE_MAX 2
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+enum ath79_spi_state {
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+ ATH79_SPI_STATE_WAIT_CMD = 0,
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+ ATH79_SPI_STATE_WAIT_READ,
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+};
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+
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struct ath79_spi {
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struct spi_bitbang bitbang;
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u32 ioc_base;
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@@ -44,6 +49,11 @@ struct ath79_spi {
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void __iomem *base;
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struct clk *clk;
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unsigned rrw_delay;
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+
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+ enum ath79_spi_state state;
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+ u32 clk_div;
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+ unsigned long read_addr;
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+ unsigned long ahb_rate;
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};
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static inline u32 ath79_spi_rr(struct ath79_spi *sp, unsigned reg)
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@@ -108,9 +118,6 @@ static void ath79_spi_enable(struct ath7
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/* save CTRL register */
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sp->reg_ctrl = ath79_spi_rr(sp, AR71XX_SPI_REG_CTRL);
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sp->ioc_base = ath79_spi_rr(sp, AR71XX_SPI_REG_IOC);
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-
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- /* TODO: setup speed? */
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- ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, 0x43);
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}
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static void ath79_spi_disable(struct ath79_spi *sp)
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@@ -222,6 +229,110 @@ static u32 ath79_spi_txrx_mode0(struct s
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return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS);
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}
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+static int ath79_spi_do_read_flash_data(struct spi_device *spi,
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+ struct spi_transfer *t)
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+{
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+ struct ath79_spi *sp = ath79_spidev_to_sp(spi);
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+
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+ /* disable GPIO mode */
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+ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0);
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+
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+ memcpy_fromio(t->rx_buf, sp->base + sp->read_addr, t->len);
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+
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+ /* enable GPIO mode */
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+ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO);
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+
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+ /* restore IOC register */
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+ ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
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+
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+ return t->len;
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+}
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+
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+static int ath79_spi_do_read_flash_cmd(struct spi_device *spi,
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+ struct spi_transfer *t)
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+{
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+ struct ath79_spi *sp = ath79_spidev_to_sp(spi);
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+ int len;
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+ const u8 *p;
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+
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+ sp->read_addr = 0;
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+
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+ len = t->len - 1;
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+ p = t->tx_buf;
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+
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+ while (len--) {
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+ p++;
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+ sp->read_addr <<= 8;
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+ sp->read_addr |= *p;
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+ }
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+
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+ return t->len;
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+}
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+
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+static bool ath79_spi_is_read_cmd(struct spi_device *spi,
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+ struct spi_transfer *t)
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+{
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+ return t->type == SPI_TRANSFER_FLASH_READ_CMD;
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+}
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+
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+static bool ath79_spi_is_data_read(struct spi_device *spi,
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+ struct spi_transfer *t)
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+{
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+ return t->type == SPI_TRANSFER_FLASH_READ_DATA;
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+}
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+
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+static int ath79_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t)
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+{
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+ struct ath79_spi *sp = ath79_spidev_to_sp(spi);
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+ int ret;
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+
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+ switch (sp->state) {
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+ case ATH79_SPI_STATE_WAIT_CMD:
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+ if (ath79_spi_is_read_cmd(spi, t)) {
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+ ret = ath79_spi_do_read_flash_cmd(spi, t);
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+ sp->state = ATH79_SPI_STATE_WAIT_READ;
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+ } else {
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+ ret = spi_bitbang_bufs(spi, t);
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+ }
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+ break;
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+
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+ case ATH79_SPI_STATE_WAIT_READ:
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+ if (ath79_spi_is_data_read(spi, t)) {
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+ ret = ath79_spi_do_read_flash_data(spi, t);
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+ } else {
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+ dev_warn(&spi->dev, "flash data read expected\n");
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+ ret = -EIO;
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+ }
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+ sp->state = ATH79_SPI_STATE_WAIT_CMD;
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+ break;
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+
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+ default:
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+ BUG();
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+ }
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+
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+ return ret;
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+}
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+
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+static int ath79_spi_setup_transfer(struct spi_device *spi,
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+ struct spi_transfer *t)
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+{
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+ struct ath79_spi *sp = ath79_spidev_to_sp(spi);
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+ struct ath79_spi_controller_data *cdata;
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+ int ret;
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+
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+ ret = spi_bitbang_setup_transfer(spi, t);
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+ if (ret)
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+ return ret;
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+
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+ cdata = spi->controller_data;
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+ if (cdata->is_flash)
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+ sp->bitbang.txrx_bufs = ath79_spi_txrx_bufs;
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+ else
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+ sp->bitbang.txrx_bufs = spi_bitbang_bufs;
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+
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+ return ret;
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+}
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+
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static __devinit int ath79_spi_probe(struct platform_device *pdev)
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{
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struct spi_master *master;
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@@ -244,6 +355,8 @@ static __devinit int ath79_spi_probe(str
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sp = spi_master_get_devdata(master);
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platform_set_drvdata(pdev, sp);
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+ sp->state = ATH79_SPI_STATE_WAIT_CMD;
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+
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master->setup = ath79_spi_setup;
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master->cleanup = ath79_spi_cleanup;
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master->bus_num = pdata->bus_num;
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@@ -252,7 +365,7 @@ static __devinit int ath79_spi_probe(str
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sp->bitbang.master = spi_master_get(master);
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sp->bitbang.chipselect = ath79_spi_chipselect;
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sp->bitbang.txrx_word[SPI_MODE_0] = ath79_spi_txrx_mode0;
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- sp->bitbang.setup_transfer = spi_bitbang_setup_transfer;
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+ sp->bitbang.setup_transfer = ath79_spi_setup_transfer;
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sp->bitbang.flags = SPI_CS_HIGH;
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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@@ -277,7 +390,8 @@ static __devinit int ath79_spi_probe(str
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if (ret)
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goto err_clk_put;
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- rate = DIV_ROUND_UP(clk_get_rate(sp->clk), MHZ);
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+ sp->ahb_rate = clk_get_rate(sp->clk);
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+ rate = DIV_ROUND_UP(sp->ahb_rate, MHZ);
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if (!rate) {
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ret = -EINVAL;
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goto err_clk_disable;
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--- a/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h
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+++ b/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h
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@@ -24,6 +24,7 @@ enum ath79_spi_cs_type {
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struct ath79_spi_controller_data {
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enum ath79_spi_cs_type cs_type;
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unsigned cs_line;
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+ bool is_flash;
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};
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#endif /* _ATH79_SPI_PLATFORM_H */
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