mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-14 05:44:03 +02:00
4c8d6ad4d0
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31060 3c298f89-4303-0410-b956-a3cf2f4a3e73
446 lines
12 KiB
Diff
446 lines
12 KiB
Diff
From 06663beb0230c02d1962eca8d9f6709c2e852328 Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Wed, 21 Mar 2012 18:14:06 +0100
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Subject: [PATCH 44/70] MIPS: NET: several fixes to etop driver
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---
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drivers/net/ethernet/lantiq_etop.c | 208 +++++++++++++++++++-----------------
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1 files changed, 108 insertions(+), 100 deletions(-)
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diff --git a/drivers/net/ethernet/lantiq_etop.c b/drivers/net/ethernet/lantiq_etop.c
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index a084d74..1a807d8 100644
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--- a/drivers/net/ethernet/lantiq_etop.c
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+++ b/drivers/net/ethernet/lantiq_etop.c
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@@ -103,15 +103,6 @@
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/* the newer xway socks have a embedded 3/7 port gbit multiplexer */
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#define ltq_has_gbit() (ltq_is_ar9() || ltq_is_vr9())
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-/* use 2 static channels for TX/RX
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- depending on the SoC we need to use different DMA channels for ethernet */
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-#define LTQ_ETOP_TX_CHANNEL 1
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-#define LTQ_ETOP_RX_CHANNEL ((ltq_is_ase()) ? (5) : \
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- ((ltq_has_gbit()) ? (0) : (6)))
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-
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-#define IS_TX(x) (x == LTQ_ETOP_TX_CHANNEL)
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-#define IS_RX(x) (x == LTQ_ETOP_RX_CHANNEL)
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-
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#define ltq_etop_r32(x) ltq_r32(ltq_etop_membase + (x))
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#define ltq_etop_w32(x, y) ltq_w32(x, ltq_etop_membase + (y))
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#define ltq_etop_w32_mask(x, y, z) \
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@@ -128,8 +119,8 @@ static void __iomem *ltq_etop_membase;
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static void __iomem *ltq_gbit_membase;
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struct ltq_etop_chan {
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- int idx;
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int tx_free;
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+ int irq;
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struct net_device *netdev;
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struct napi_struct napi;
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struct ltq_dma_channel dma;
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@@ -144,8 +135,8 @@ struct ltq_etop_priv {
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struct mii_bus *mii_bus;
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struct phy_device *phydev;
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- struct ltq_etop_chan ch[MAX_DMA_CHAN];
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- int tx_free[MAX_DMA_CHAN >> 1];
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+ struct ltq_etop_chan txch;
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+ struct ltq_etop_chan rxch;
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spinlock_t lock;
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@@ -206,8 +197,10 @@ ltq_etop_poll_rx(struct napi_struct *napi, int budget)
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{
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struct ltq_etop_chan *ch = container_of(napi,
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struct ltq_etop_chan, napi);
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+ struct ltq_etop_priv *priv = netdev_priv(ch->netdev);
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int rx = 0;
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int complete = 0;
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+ unsigned long flags;
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while ((rx < budget) && !complete) {
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struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc];
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@@ -221,7 +214,9 @@ ltq_etop_poll_rx(struct napi_struct *napi, int budget)
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}
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if (complete || !rx) {
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napi_complete(&ch->napi);
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+ spin_lock_irqsave(&priv->lock, flags);
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ltq_dma_ack_irq(&ch->dma);
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+ spin_unlock_irqrestore(&priv->lock, flags);
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}
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return rx;
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}
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@@ -233,7 +228,7 @@ ltq_etop_poll_tx(struct napi_struct *napi, int budget)
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container_of(napi, struct ltq_etop_chan, napi);
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struct ltq_etop_priv *priv = netdev_priv(ch->netdev);
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struct netdev_queue *txq =
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- netdev_get_tx_queue(ch->netdev, ch->idx >> 1);
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+ netdev_get_tx_queue(ch->netdev, ch->dma.nr >> 1);
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unsigned long flags;
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spin_lock_irqsave(&priv->lock, flags);
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@@ -251,7 +246,9 @@ ltq_etop_poll_tx(struct napi_struct *napi, int budget)
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if (netif_tx_queue_stopped(txq))
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netif_tx_start_queue(txq);
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napi_complete(&ch->napi);
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+ spin_lock_irqsave(&priv->lock, flags);
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ltq_dma_ack_irq(&ch->dma);
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+ spin_unlock_irqrestore(&priv->lock, flags);
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return 1;
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}
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@@ -259,9 +256,10 @@ static irqreturn_t
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ltq_etop_dma_irq(int irq, void *_priv)
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{
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struct ltq_etop_priv *priv = _priv;
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- int ch = irq - LTQ_DMA_ETOP;
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-
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- napi_schedule(&priv->ch[ch].napi);
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+ if (irq == priv->txch.dma.irq)
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+ napi_schedule(&priv->txch.napi);
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+ else
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+ napi_schedule(&priv->rxch.napi);
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return IRQ_HANDLED;
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}
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@@ -273,7 +271,7 @@ ltq_etop_free_channel(struct net_device *dev, struct ltq_etop_chan *ch)
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ltq_dma_free(&ch->dma);
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if (ch->dma.irq)
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free_irq(ch->dma.irq, priv);
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- if (IS_RX(ch->idx)) {
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+ if (ch == &priv->txch) {
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int desc;
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for (desc = 0; desc < LTQ_DESC_NUM; desc++)
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dev_kfree_skb_any(ch->skb[ch->dma.desc]);
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@@ -284,7 +282,6 @@ static void
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ltq_etop_hw_exit(struct net_device *dev)
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{
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struct ltq_etop_priv *priv = netdev_priv(dev);
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- int i;
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clk_disable(priv->clk_ppe);
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@@ -296,9 +293,8 @@ ltq_etop_hw_exit(struct net_device *dev)
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clk_disable(priv->clk_ephycgu);
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}
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- for (i = 0; i < MAX_DMA_CHAN; i++)
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- if (IS_TX(i) || IS_RX(i))
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- ltq_etop_free_channel(dev, &priv->ch[i]);
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+ ltq_etop_free_channel(dev, &priv->txch);
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+ ltq_etop_free_channel(dev, &priv->rxch);
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}
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static void
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@@ -326,8 +322,6 @@ ltq_etop_hw_init(struct net_device *dev)
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{
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struct ltq_etop_priv *priv = netdev_priv(dev);
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unsigned int mii_mode = priv->pldata->mii_mode;
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- int err = 0;
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- int i;
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clk_enable(priv->clk_ppe);
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@@ -369,31 +363,50 @@ ltq_etop_hw_init(struct net_device *dev)
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/* enable crc generation */
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ltq_etop_w32(PPE32_CGEN, LQ_PPE32_ENET_MAC_CFG);
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+ return 0;
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+}
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+
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+static int
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+ltq_etop_dma_init(struct net_device *dev)
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+{
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+ struct ltq_etop_priv *priv = netdev_priv(dev);
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+ int tx = 1;
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+ int rx = ((ltq_is_ase()) ? (5) : \
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+ ((ltq_is_ar9()) ? (0) : (6)));
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+ int tx_irq = LTQ_DMA_ETOP + tx;
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+ int rx_irq = LTQ_DMA_ETOP + rx;
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+ int err;
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+
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ltq_dma_init_port(DMA_PORT_ETOP);
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- for (i = 0; i < MAX_DMA_CHAN && !err; i++) {
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- int irq = LTQ_DMA_ETOP + i;
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- struct ltq_etop_chan *ch = &priv->ch[i];
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-
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- ch->idx = ch->dma.nr = i;
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-
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- if (IS_TX(i)) {
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- ltq_dma_alloc_tx(&ch->dma);
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- err = request_irq(irq, ltq_etop_dma_irq, IRQF_DISABLED,
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- "etop_tx", priv);
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- } else if (IS_RX(i)) {
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- ltq_dma_alloc_rx(&ch->dma);
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- for (ch->dma.desc = 0; ch->dma.desc < LTQ_DESC_NUM;
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- ch->dma.desc++)
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- if (ltq_etop_alloc_skb(ch))
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- err = -ENOMEM;
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- ch->dma.desc = 0;
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- err = request_irq(irq, ltq_etop_dma_irq, IRQF_DISABLED,
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- "etop_rx", priv);
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+ priv->txch.dma.nr = tx;
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+ ltq_dma_alloc_tx(&priv->txch.dma);
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+ err = request_irq(tx_irq, ltq_etop_dma_irq, IRQF_DISABLED,
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+ "eth_tx", priv);
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+ if (err) {
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+ netdev_err(dev, "failed to allocate tx irq\n");
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+ goto err_out;
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+ }
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+ priv->txch.dma.irq = tx_irq;
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+
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+ priv->rxch.dma.nr = rx;
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+ ltq_dma_alloc_rx(&priv->rxch.dma);
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+ for (priv->rxch.dma.desc = 0; priv->rxch.dma.desc < LTQ_DESC_NUM;
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+ priv->rxch.dma.desc++) {
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+ if (ltq_etop_alloc_skb(&priv->rxch)) {
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+ netdev_err(dev, "failed to allocate skbs\n");
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+ err = -ENOMEM;
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+ goto err_out;
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}
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- if (!err)
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- ch->dma.irq = irq;
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}
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+ priv->rxch.dma.desc = 0;
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+ err = request_irq(rx_irq, ltq_etop_dma_irq, IRQF_DISABLED,
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+ "eth_rx", priv);
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+ if (err)
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+ netdev_err(dev, "failed to allocate rx irq\n");
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+ else
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+ priv->rxch.dma.irq = rx_irq;
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+err_out:
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return err;
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}
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@@ -410,7 +423,10 @@ ltq_etop_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
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{
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struct ltq_etop_priv *priv = netdev_priv(dev);
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- return phy_ethtool_gset(priv->phydev, cmd);
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+ if (priv->phydev)
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+ return phy_ethtool_gset(priv->phydev, cmd);
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+ else
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+ return 0;
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}
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static int
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@@ -418,7 +434,10 @@ ltq_etop_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
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{
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struct ltq_etop_priv *priv = netdev_priv(dev);
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- return phy_ethtool_sset(priv->phydev, cmd);
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+ if (priv->phydev)
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+ return phy_ethtool_sset(priv->phydev, cmd);
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+ else
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+ return 0;
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}
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static int
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@@ -426,7 +445,10 @@ ltq_etop_nway_reset(struct net_device *dev)
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{
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struct ltq_etop_priv *priv = netdev_priv(dev);
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- return phy_start_aneg(priv->phydev);
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+ if (priv->phydev)
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+ return phy_start_aneg(priv->phydev);
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+ else
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+ return 0;
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}
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static const struct ethtool_ops ltq_etop_ethtool_ops = {
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@@ -618,18 +640,19 @@ static int
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ltq_etop_open(struct net_device *dev)
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{
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struct ltq_etop_priv *priv = netdev_priv(dev);
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- int i;
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+ unsigned long flags;
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- for (i = 0; i < MAX_DMA_CHAN; i++) {
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- struct ltq_etop_chan *ch = &priv->ch[i];
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+ napi_enable(&priv->txch.napi);
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+ napi_enable(&priv->rxch.napi);
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+
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+ spin_lock_irqsave(&priv->lock, flags);
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+ ltq_dma_open(&priv->txch.dma);
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+ ltq_dma_open(&priv->rxch.dma);
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+ spin_unlock_irqrestore(&priv->lock, flags);
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- if (!IS_TX(i) && (!IS_RX(i)))
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- continue;
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- ltq_dma_open(&ch->dma);
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- napi_enable(&ch->napi);
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- }
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if (priv->phydev)
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phy_start(priv->phydev);
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+
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netif_tx_start_all_queues(dev);
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return 0;
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}
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@@ -638,19 +661,19 @@ static int
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ltq_etop_stop(struct net_device *dev)
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{
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struct ltq_etop_priv *priv = netdev_priv(dev);
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- int i;
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+ unsigned long flags;
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netif_tx_stop_all_queues(dev);
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if (priv->phydev)
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phy_stop(priv->phydev);
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- for (i = 0; i < MAX_DMA_CHAN; i++) {
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- struct ltq_etop_chan *ch = &priv->ch[i];
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+ napi_disable(&priv->txch.napi);
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+ napi_disable(&priv->rxch.napi);
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+
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+ spin_lock_irqsave(&priv->lock, flags);
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+ ltq_dma_close(&priv->txch.dma);
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+ ltq_dma_close(&priv->rxch.dma);
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+ spin_unlock_irqrestore(&priv->lock, flags);
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- if (!IS_RX(i) && !IS_TX(i))
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- continue;
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- napi_disable(&ch->napi);
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- ltq_dma_close(&ch->dma);
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- }
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return 0;
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}
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@@ -660,16 +683,16 @@ ltq_etop_tx(struct sk_buff *skb, struct net_device *dev)
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int queue = skb_get_queue_mapping(skb);
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struct netdev_queue *txq = netdev_get_tx_queue(dev, queue);
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struct ltq_etop_priv *priv = netdev_priv(dev);
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- struct ltq_etop_chan *ch = &priv->ch[(queue << 1) | 1];
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- struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc];
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+ struct ltq_dma_desc *desc =
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+ &priv->txch.dma.desc_base[priv->txch.dma.desc];
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unsigned long flags;
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u32 byte_offset;
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int len;
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len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
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- if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) || ch->skb[ch->dma.desc]) {
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- dev_kfree_skb_any(skb);
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+ if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) ||
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+ priv->txch.skb[priv->txch.dma.desc]) {
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netdev_err(dev, "tx ring full\n");
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netif_tx_stop_queue(txq);
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return NETDEV_TX_BUSY;
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@@ -677,7 +700,7 @@ ltq_etop_tx(struct sk_buff *skb, struct net_device *dev)
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/* dma needs to start on a 16 byte aligned address */
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byte_offset = CPHYSADDR(skb->data) % 16;
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- ch->skb[ch->dma.desc] = skb;
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+ priv->txch.skb[priv->txch.dma.desc] = skb;
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dev->trans_start = jiffies;
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@@ -687,11 +710,11 @@ ltq_etop_tx(struct sk_buff *skb, struct net_device *dev)
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wmb();
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desc->ctl = LTQ_DMA_OWN | LTQ_DMA_SOP | LTQ_DMA_EOP |
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LTQ_DMA_TX_OFFSET(byte_offset) | (len & LTQ_DMA_SIZE_MASK);
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- ch->dma.desc++;
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- ch->dma.desc %= LTQ_DESC_NUM;
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+ priv->txch.dma.desc++;
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+ priv->txch.dma.desc %= LTQ_DESC_NUM;
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spin_unlock_irqrestore(&priv->lock, flags);
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- if (ch->dma.desc_base[ch->dma.desc].ctl & LTQ_DMA_OWN)
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+ if (priv->txch.dma.desc_base[priv->txch.dma.desc].ctl & LTQ_DMA_OWN)
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netif_tx_stop_queue(txq);
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return NETDEV_TX_OK;
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@@ -776,6 +799,10 @@ ltq_etop_init(struct net_device *dev)
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err = ltq_etop_hw_init(dev);
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if (err)
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goto err_hw;
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+ err = ltq_etop_dma_init(dev);
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+ if (err)
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+ goto err_hw;
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+
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ltq_etop_change_mtu(dev, 1500);
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memcpy(&mac, &priv->pldata->mac, sizeof(struct sockaddr));
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@@ -811,6 +838,9 @@ ltq_etop_tx_timeout(struct net_device *dev)
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err = ltq_etop_hw_init(dev);
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if (err)
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goto err_hw;
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+ err = ltq_etop_dma_init(dev);
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+ if (err)
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+ goto err_hw;
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dev->trans_start = jiffies;
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netif_wake_queue(dev);
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return;
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@@ -834,14 +864,13 @@ static const struct net_device_ops ltq_eth_netdev_ops = {
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.ndo_tx_timeout = ltq_etop_tx_timeout,
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};
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-static int __init
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+static int __devinit
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ltq_etop_probe(struct platform_device *pdev)
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{
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struct net_device *dev;
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struct ltq_etop_priv *priv;
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struct resource *res, *gbit_res;
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int err;
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- int i;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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@@ -917,15 +946,10 @@ ltq_etop_probe(struct platform_device *pdev)
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spin_lock_init(&priv->lock);
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- for (i = 0; i < MAX_DMA_CHAN; i++) {
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- if (IS_TX(i))
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- netif_napi_add(dev, &priv->ch[i].napi,
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- ltq_etop_poll_tx, 8);
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- else if (IS_RX(i))
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- netif_napi_add(dev, &priv->ch[i].napi,
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- ltq_etop_poll_rx, 32);
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- priv->ch[i].netdev = dev;
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- }
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+ netif_napi_add(dev, &priv->txch.napi, ltq_etop_poll_tx, 8);
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+ netif_napi_add(dev, &priv->rxch.napi, ltq_etop_poll_rx, 32);
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+ priv->txch.netdev = dev;
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+ priv->rxch.netdev = dev;
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err = register_netdev(dev);
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if (err)
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@@ -955,6 +979,7 @@ ltq_etop_remove(struct platform_device *pdev)
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}
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static struct platform_driver ltq_mii_driver = {
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+ .probe = ltq_etop_probe,
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.remove = __devexit_p(ltq_etop_remove),
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.driver = {
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.name = "ltq_etop",
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@@ -962,24 +987,7 @@ static struct platform_driver ltq_mii_driver = {
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},
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};
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-int __init
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-init_ltq_etop(void)
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-{
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- int ret = platform_driver_probe(<q_mii_driver, ltq_etop_probe);
|
|
-
|
|
- if (ret)
|
|
- pr_err("ltq_etop: Error registering platfom driver!");
|
|
- return ret;
|
|
-}
|
|
-
|
|
-static void __exit
|
|
-exit_ltq_etop(void)
|
|
-{
|
|
- platform_driver_unregister(<q_mii_driver);
|
|
-}
|
|
-
|
|
-module_init(init_ltq_etop);
|
|
-module_exit(exit_ltq_etop);
|
|
+module_platform_driver(ltq_mii_driver);
|
|
|
|
MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
|
|
MODULE_DESCRIPTION("Lantiq SoC ETOP");
|
|
--
|
|
1.7.7.1
|
|
|