mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-29 07:09:55 +02:00
69 lines
2.1 KiB
Diff
69 lines
2.1 KiB
Diff
--- a/drivers/mtd/nand/Kconfig
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+++ b/drivers/mtd/nand/Kconfig
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@@ -452,4 +452,10 @@ config MTD_NAND_SOCRATES
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help
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Enables support for NAND Flash chips wired onto Socrates board.
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+config MTD_NAND_JZ4740
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+ tristate "Support NAND Flash device on Jz4740 board"
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+ depends on SOC_JZ4740
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+ help
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+ Support NAND Flash device on Jz4740 board
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+
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endif # MTD_NAND
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--- a/drivers/mtd/nand/Makefile
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+++ b/drivers/mtd/nand/Makefile
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@@ -40,5 +40,6 @@ obj-$(CONFIG_MTD_NAND_SH_FLCTL) += sh_f
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obj-$(CONFIG_MTD_NAND_MXC) += mxc_nand.o
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obj-$(CONFIG_MTD_NAND_SOCRATES) += socrates_nand.o
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obj-$(CONFIG_MTD_NAND_TXX9NDFMC) += txx9ndfmc.o
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+obj-$(CONFIG_MTD_NAND_JZ4740) += jz4740_nand.o
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nand-objs := nand_base.o nand_bbt.o
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--- a/drivers/mtd/nand/nand_base.c
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+++ b/drivers/mtd/nand/nand_base.c
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@@ -953,29 +953,22 @@ static int nand_read_page_hwecc(struct m
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uint8_t *ecc_calc = chip->buffers->ecccalc;
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uint8_t *ecc_code = chip->buffers->ecccode;
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uint32_t *eccpos = chip->ecc.layout->eccpos;
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-
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- for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
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- chip->ecc.hwctl(mtd, NAND_ECC_READ);
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- chip->read_buf(mtd, p, eccsize);
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- chip->ecc.calculate(mtd, p, &ecc_calc[i]);
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- }
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- chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
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+ int stat;
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for (i = 0; i < chip->ecc.total; i++)
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ecc_code[i] = chip->oob_poi[eccpos[i]];
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- eccsteps = chip->ecc.steps;
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- p = buf;
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-
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- for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
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- int stat;
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+ for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
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+ chip->ecc.hwctl(mtd, NAND_ECC_READ);
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+ chip->read_buf(mtd, p, eccsize);
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stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
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if (stat < 0)
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mtd->ecc_stats.failed++;
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else
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mtd->ecc_stats.corrected += stat;
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}
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+
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return 0;
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}
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@@ -1125,6 +1118,8 @@ static int nand_do_read_ops(struct mtd_i
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bufpoi = aligned ? buf : chip->buffers->databuf;
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if (likely(sndcmd)) {
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+ chip->cmdfunc(mtd, NAND_CMD_READOOB, 0x00, page);
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+ chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
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chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
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sndcmd = 0;
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}
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