mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-18 17:54:04 +02:00
bf183aeff8
* this adds sflash support for ssb devices * the flash is now a platform device * minor updates git-svn-id: svn://svn.openwrt.org/openwrt/trunk@27902 3c298f89-4303-0410-b956-a3cf2f4a3e73
105 lines
2.8 KiB
Diff
105 lines
2.8 KiB
Diff
--- a/drivers/watchdog/bcm47xx_wdt.c
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+++ b/drivers/watchdog/bcm47xx_wdt.c
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@@ -31,6 +31,7 @@
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#define WDT_DEFAULT_TIME 30 /* seconds */
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#define WDT_MAX_TIME 255 /* seconds */
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+#define WDT_SHIFT 15 /* 32.768 KHz on cores with slow WDT clock */
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static int wdt_time = WDT_DEFAULT_TIME;
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static int nowayout = WATCHDOG_NOWAYOUT;
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@@ -50,20 +51,20 @@ static unsigned long bcm47xx_wdt_busy;
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static char expect_release;
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static struct timer_list wdt_timer;
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static atomic_t ticks;
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+static int needs_sw_scale;
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-static inline void bcm47xx_wdt_hw_start(void)
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+static inline void bcm47xx_wdt_hw_start(u32 ticks)
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{
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- /* this is 2,5s on 100Mhz clock and 2s on 133 Mhz */
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switch (bcm47xx_bus_type) {
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#ifdef CONFIG_BCM47XX_SSB
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case BCM47XX_BUS_TYPE_SSB:
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- ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0xfffffff);
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+ ssb_watchdog_timer_set(&bcm47xx_bus.ssb, ticks);
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break;
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#endif
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#ifdef CONFIG_BCM47XX_BCMA
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case BCM47XX_BUS_TYPE_BCMA:
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bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc,
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- 0xfffffff);
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+ ticks);
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break;
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#endif
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}
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@@ -88,33 +89,34 @@ static inline int bcm47xx_wdt_hw_stop(vo
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static void bcm47xx_timer_tick(unsigned long unused)
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{
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if (!atomic_dec_and_test(&ticks)) {
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- bcm47xx_wdt_hw_start();
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+ /* This is 2,5s on 100Mhz clock and 2s on 133 Mhz */
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+ bcm47xx_wdt_hw_start(0xfffffff);
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mod_timer(&wdt_timer, jiffies + HZ);
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} else {
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- printk(KERN_CRIT DRV_NAME "Watchdog will fire soon!!!\n");
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+ printk(KERN_CRIT DRV_NAME ": Watchdog will fire soon!!!\n");
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}
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}
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-static inline void bcm47xx_wdt_pet(void)
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+static void bcm47xx_wdt_pet(void)
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{
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- atomic_set(&ticks, wdt_time);
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+ if(needs_sw_scale)
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+ atomic_set(&ticks, wdt_time);
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+ else
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+ bcm47xx_wdt_hw_start(wdt_time << WDT_SHIFT);
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}
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static void bcm47xx_wdt_start(void)
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{
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bcm47xx_wdt_pet();
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- bcm47xx_timer_tick(0);
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-}
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-
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-static void bcm47xx_wdt_pause(void)
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-{
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- del_timer_sync(&wdt_timer);
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- bcm47xx_wdt_hw_stop();
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+ if(needs_sw_scale)
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+ bcm47xx_timer_tick(0);
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}
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static void bcm47xx_wdt_stop(void)
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{
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- bcm47xx_wdt_pause();
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+ if(needs_sw_scale)
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+ del_timer_sync(&wdt_timer);
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+ bcm47xx_wdt_hw_stop();
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}
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static int bcm47xx_wdt_settimeout(int new_time)
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@@ -266,7 +268,20 @@ static int __init bcm47xx_wdt_init(void)
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if (bcm47xx_wdt_hw_stop() < 0)
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return -ENODEV;
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- setup_timer(&wdt_timer, bcm47xx_timer_tick, 0L);
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+ /* FIXME Other cores */
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+#ifdef BCM47XX_BUS_TYPE_BCMA
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+ if(bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA &&
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+ bcm47xx_bus.ssb.chip_id == 0x5354) {
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+ /* Slow WDT clock, no pre-scaling */
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+ needs_sw_scale = 0;
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+ } else {
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+#endif
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+ /* Fast WDT clock, needs software pre-scaling */
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+ needs_sw_scale = 1;
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+ setup_timer(&wdt_timer, bcm47xx_timer_tick, 0L);
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+#ifdef BCM47XX_BUS_TYPE_BCMA
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+ }
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+#endif
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if (bcm47xx_wdt_settimeout(wdt_time)) {
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bcm47xx_wdt_settimeout(WDT_DEFAULT_TIME);
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