mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-18 20:34:39 +02:00
288f3f6650
* update the flash driver for bcm47xx to use the stubs already in bcma * do some misc enhancements to the flash drivers for bcm47xx git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33920 3c298f89-4303-0410-b956-a3cf2f4a3e73
83 lines
2.5 KiB
Diff
83 lines
2.5 KiB
Diff
--- a/drivers/ssb/driver_mipscore.c
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+++ b/drivers/ssb/driver_mipscore.c
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@@ -190,16 +190,32 @@ static void ssb_mips_flash_detect(struct
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{
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struct ssb_bus *bus = mcore->dev->bus;
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- mcore->flash_buswidth = 2;
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- if (bus->chipco.dev) {
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- mcore->flash_window = 0x1c000000;
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- mcore->flash_window_size = 0x02000000;
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+ /* When there is no chipcommon on the bus there is 4MB flash */
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+ if (!bus->chipco.dev) {
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+ mcore->pflash.present = true;
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+ mcore->pflash.buswidth = 2;
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+ mcore->pflash.window = SSB_FLASH1;
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+ mcore->pflash.window_size = SSB_FLASH1_SZ;
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+ return;
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+ }
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+
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+ /* There is ChipCommon, so use it to read info about flash */
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+ switch (bus->chipco.capabilities & SSB_CHIPCO_CAP_FLASHT) {
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+ case SSB_CHIPCO_FLASHT_STSER:
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+ case SSB_CHIPCO_FLASHT_ATSER:
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+ pr_err("Serial flash not supported\n");
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+ break;
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+ case SSB_CHIPCO_FLASHT_PARA:
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+ pr_debug("Found parallel flash\n");
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+ mcore->pflash.present = true;
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+ mcore->pflash.window = SSB_FLASH2;
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+ mcore->pflash.window_size = SSB_FLASH2_SZ;
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if ((ssb_read32(bus->chipco.dev, SSB_CHIPCO_FLASH_CFG)
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& SSB_CHIPCO_CFG_DS16) == 0)
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- mcore->flash_buswidth = 1;
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- } else {
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- mcore->flash_window = 0x1fc00000;
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- mcore->flash_window_size = 0x00400000;
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+ mcore->pflash.buswidth = 1;
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+ else
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+ mcore->pflash.buswidth = 2;
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+ break;
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}
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}
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--- a/include/linux/ssb/ssb_driver_chipcommon.h
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+++ b/include/linux/ssb/ssb_driver_chipcommon.h
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@@ -504,7 +504,9 @@
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#define SSB_CHIPCO_FLASHCTL_ST_SE 0x02D8 /* Sector Erase */
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#define SSB_CHIPCO_FLASHCTL_ST_BE 0x00C7 /* Bulk Erase */
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#define SSB_CHIPCO_FLASHCTL_ST_DP 0x00B9 /* Deep Power-down */
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-#define SSB_CHIPCO_FLASHCTL_ST_RSIG 0x03AB /* Read Electronic Signature */
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+#define SSB_CHIPCO_FLASHCTL_ST_RES 0x03AB /* Read Electronic Signature */
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+#define SSB_CHIPCO_FLASHCTL_ST_CSA 0x1000 /* Keep chip select asserted */
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+#define SSB_CHIPCO_FLASHCTL_ST_SSE 0x0220 /* Sub-sector Erase */
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/* Status register bits for ST flashes */
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#define SSB_CHIPCO_FLASHSTA_ST_WIP 0x01 /* Write In Progress */
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--- a/include/linux/ssb/ssb_driver_mips.h
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+++ b/include/linux/ssb/ssb_driver_mips.h
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@@ -13,6 +13,12 @@ struct ssb_serial_port {
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unsigned int reg_shift;
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};
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+struct ssb_pflash {
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+ bool present;
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+ u8 buswidth;
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+ u32 window;
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+ u32 window_size;
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+};
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struct ssb_mipscore {
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struct ssb_device *dev;
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@@ -20,9 +26,7 @@ struct ssb_mipscore {
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int nr_serial_ports;
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struct ssb_serial_port serial_ports[4];
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- u8 flash_buswidth;
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- u32 flash_window;
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- u32 flash_window_size;
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+ struct ssb_pflash pflash;
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};
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extern void ssb_mipscore_init(struct ssb_mipscore *mcore);
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