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e2133d3ce6
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@8137 3c298f89-4303-0410-b956-a3cf2f4a3e73
201 lines
9.2 KiB
C
201 lines
9.2 KiB
C
/* irq.h - AMAZON interrupts */
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#ifndef __AMAZON_IRQ
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#define __AMAZON_IRQ
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/************************************************************************
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* Interrupt information
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*************************************************************************/
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/* these vectors are to handle the interrupts from the internal AMAZON
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interrupt controller. THe INT_NUM values are really just indices into
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an array and are set up so that we can use the INT_NUM as a shift
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to calculate a mask value. */
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#define INT_NUM_IRQ0 8
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#define INT_NUM_IM0_IRL0 (INT_NUM_IRQ0 + 0)
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#define INT_NUM_IM0_IRL1 (INT_NUM_IRQ0 + 1)
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#define INT_NUM_IM0_IRL2 (INT_NUM_IRQ0 + 2)
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#define INT_NUM_IM0_IRL3 (INT_NUM_IRQ0 + 3)
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#define INT_NUM_IM0_IRL4 (INT_NUM_IRQ0 + 4)
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#define INT_NUM_IM0_IRL5 (INT_NUM_IRQ0 + 5)
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#define INT_NUM_IM0_IRL6 (INT_NUM_IRQ0 + 6)
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#define INT_NUM_IM0_IRL7 (INT_NUM_IRQ0 + 7)
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#define INT_NUM_IM0_IRL8 (INT_NUM_IRQ0 + 8)
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#define INT_NUM_IM0_IRL9 (INT_NUM_IRQ0 + 9)
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#define INT_NUM_IM0_IRL10 (INT_NUM_IRQ0 + 10)
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#define INT_NUM_IM0_IRL11 (INT_NUM_IRQ0 + 11)
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#define INT_NUM_IM0_IRL12 (INT_NUM_IRQ0 + 12)
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#define INT_NUM_IM0_IRL13 (INT_NUM_IRQ0 + 13)
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#define INT_NUM_IM0_IRL14 (INT_NUM_IRQ0 + 14)
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#define INT_NUM_IM0_IRL15 (INT_NUM_IRQ0 + 15)
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#define INT_NUM_IM0_IRL16 (INT_NUM_IRQ0 + 16)
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#define INT_NUM_IM0_IRL17 (INT_NUM_IRQ0 + 17)
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#define INT_NUM_IM0_IRL18 (INT_NUM_IRQ0 + 18)
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#define INT_NUM_IM0_IRL19 (INT_NUM_IRQ0 + 19)
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#define INT_NUM_IM0_IRL20 (INT_NUM_IRQ0 + 20)
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#define INT_NUM_IM0_IRL21 (INT_NUM_IRQ0 + 21)
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#define INT_NUM_IM0_IRL22 (INT_NUM_IRQ0 + 22)
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#define INT_NUM_IM0_IRL23 (INT_NUM_IRQ0 + 23)
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#define INT_NUM_IM0_IRL24 (INT_NUM_IRQ0 + 24)
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#define INT_NUM_IM0_IRL25 (INT_NUM_IRQ0 + 25)
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#define INT_NUM_IM0_IRL26 (INT_NUM_IRQ0 + 26)
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#define INT_NUM_IM0_IRL27 (INT_NUM_IRQ0 + 27)
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#define INT_NUM_IM0_IRL28 (INT_NUM_IRQ0 + 28)
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#define INT_NUM_IM0_IRL29 (INT_NUM_IRQ0 + 29)
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#define INT_NUM_IM0_IRL30 (INT_NUM_IRQ0 + 30)
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#define INT_NUM_IM0_IRL31 (INT_NUM_IRQ0 + 31)
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#define INT_NUM_IM1_IRL0 (INT_NUM_IRQ0 + 32)
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#define INT_NUM_IM1_IRL1 (INT_NUM_IM1_IRL0 + 1)
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#define INT_NUM_IM1_IRL2 (INT_NUM_IM1_IRL0 + 2)
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#define INT_NUM_IM1_IRL3 (INT_NUM_IM1_IRL0 + 3)
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#define INT_NUM_IM1_IRL4 (INT_NUM_IM1_IRL0 + 4)
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#define INT_NUM_IM1_IRL5 (INT_NUM_IM1_IRL0 + 5)
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#define INT_NUM_IM1_IRL6 (INT_NUM_IM1_IRL0 + 6)
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#define INT_NUM_IM1_IRL7 (INT_NUM_IM1_IRL0 + 7)
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#define INT_NUM_IM1_IRL8 (INT_NUM_IM1_IRL0 + 8)
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#define INT_NUM_IM1_IRL9 (INT_NUM_IM1_IRL0 + 9)
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#define INT_NUM_IM1_IRL10 (INT_NUM_IM1_IRL0 + 10)
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#define INT_NUM_IM1_IRL11 (INT_NUM_IM1_IRL0 + 11)
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#define INT_NUM_IM1_IRL12 (INT_NUM_IM1_IRL0 + 12)
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#define INT_NUM_IM1_IRL13 (INT_NUM_IM1_IRL0 + 13)
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#define INT_NUM_IM1_IRL14 (INT_NUM_IM1_IRL0 + 14)
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#define INT_NUM_IM1_IRL15 (INT_NUM_IM1_IRL0 + 15)
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#define INT_NUM_IM1_IRL16 (INT_NUM_IM1_IRL0 + 16)
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#define INT_NUM_IM1_IRL17 (INT_NUM_IM1_IRL0 + 17)
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#define INT_NUM_IM1_IRL18 (INT_NUM_IM1_IRL0 + 18)
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#define INT_NUM_IM1_IRL19 (INT_NUM_IM1_IRL0 + 19)
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#define INT_NUM_IM1_IRL20 (INT_NUM_IM1_IRL0 + 20)
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#define INT_NUM_IM1_IRL21 (INT_NUM_IM1_IRL0 + 21)
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#define INT_NUM_IM1_IRL22 (INT_NUM_IM1_IRL0 + 22)
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#define INT_NUM_IM1_IRL23 (INT_NUM_IM1_IRL0 + 23)
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#define INT_NUM_IM1_IRL24 (INT_NUM_IM1_IRL0 + 24)
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#define INT_NUM_IM1_IRL25 (INT_NUM_IM1_IRL0 + 25)
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#define INT_NUM_IM1_IRL26 (INT_NUM_IM1_IRL0 + 26)
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#define INT_NUM_IM1_IRL27 (INT_NUM_IM1_IRL0 + 27)
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#define INT_NUM_IM1_IRL28 (INT_NUM_IM1_IRL0 + 28)
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#define INT_NUM_IM1_IRL29 (INT_NUM_IM1_IRL0 + 29)
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#define INT_NUM_IM1_IRL30 (INT_NUM_IM1_IRL0 + 30)
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#define INT_NUM_IM1_IRL31 (INT_NUM_IM1_IRL0 + 31)
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#define INT_NUM_IM2_IRL0 (INT_NUM_IRQ0 + 64)
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#define INT_NUM_IM2_IRL1 (INT_NUM_IM2_IRL0 + 1)
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#define INT_NUM_IM2_IRL2 (INT_NUM_IM2_IRL0 + 2)
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#define INT_NUM_IM2_IRL3 (INT_NUM_IM2_IRL0 + 3)
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#define INT_NUM_IM2_IRL4 (INT_NUM_IM2_IRL0 + 4)
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#define INT_NUM_IM2_IRL5 (INT_NUM_IM2_IRL0 + 5)
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#define INT_NUM_IM2_IRL6 (INT_NUM_IM2_IRL0 + 6)
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#define INT_NUM_IM2_IRL7 (INT_NUM_IM2_IRL0 + 7)
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#define INT_NUM_IM2_IRL8 (INT_NUM_IM2_IRL0 + 8)
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#define INT_NUM_IM2_IRL9 (INT_NUM_IM2_IRL0 + 9)
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#define INT_NUM_IM2_IRL10 (INT_NUM_IM2_IRL0 + 10)
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#define INT_NUM_IM2_IRL11 (INT_NUM_IM2_IRL0 + 11)
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#define INT_NUM_IM2_IRL12 (INT_NUM_IM2_IRL0 + 12)
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#define INT_NUM_IM2_IRL13 (INT_NUM_IM2_IRL0 + 13)
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#define INT_NUM_IM2_IRL14 (INT_NUM_IM2_IRL0 + 14)
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#define INT_NUM_IM2_IRL15 (INT_NUM_IM2_IRL0 + 15)
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#define INT_NUM_IM2_IRL16 (INT_NUM_IM2_IRL0 + 16)
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#define INT_NUM_IM2_IRL17 (INT_NUM_IM2_IRL0 + 17)
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#define INT_NUM_IM2_IRL18 (INT_NUM_IM2_IRL0 + 18)
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#define INT_NUM_IM2_IRL19 (INT_NUM_IM2_IRL0 + 19)
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#define INT_NUM_IM2_IRL20 (INT_NUM_IM2_IRL0 + 20)
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#define INT_NUM_IM2_IRL21 (INT_NUM_IM2_IRL0 + 21)
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#define INT_NUM_IM2_IRL22 (INT_NUM_IM2_IRL0 + 22)
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#define INT_NUM_IM2_IRL23 (INT_NUM_IM2_IRL0 + 23)
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#define INT_NUM_IM2_IRL24 (INT_NUM_IM2_IRL0 + 24)
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#define INT_NUM_IM2_IRL25 (INT_NUM_IM2_IRL0 + 25)
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#define INT_NUM_IM2_IRL26 (INT_NUM_IM2_IRL0 + 26)
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#define INT_NUM_IM2_IRL27 (INT_NUM_IM2_IRL0 + 27)
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#define INT_NUM_IM2_IRL28 (INT_NUM_IM2_IRL0 + 28)
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#define INT_NUM_IM2_IRL29 (INT_NUM_IM2_IRL0 + 29)
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#define INT_NUM_IM2_IRL30 (INT_NUM_IM2_IRL0 + 30)
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#define INT_NUM_IM2_IRL31 (INT_NUM_IM2_IRL0 + 31)
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#define INT_NUM_IM3_IRL0 (INT_NUM_IRQ0 + 96)
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#define INT_NUM_IM3_IRL1 (INT_NUM_IM3_IRL0 + 1)
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#define INT_NUM_IM3_IRL2 (INT_NUM_IM3_IRL0 + 2)
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#define INT_NUM_IM3_IRL3 (INT_NUM_IM3_IRL0 + 3)
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#define INT_NUM_IM3_IRL4 (INT_NUM_IM3_IRL0 + 4)
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#define INT_NUM_IM3_IRL5 (INT_NUM_IM3_IRL0 + 5)
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#define INT_NUM_IM3_IRL6 (INT_NUM_IM3_IRL0 + 6)
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#define INT_NUM_IM3_IRL7 (INT_NUM_IM3_IRL0 + 7)
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#define INT_NUM_IM3_IRL8 (INT_NUM_IM3_IRL0 + 8)
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#define INT_NUM_IM3_IRL9 (INT_NUM_IM3_IRL0 + 9)
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#define INT_NUM_IM3_IRL10 (INT_NUM_IM3_IRL0 + 10)
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#define INT_NUM_IM3_IRL11 (INT_NUM_IM3_IRL0 + 11)
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#define INT_NUM_IM3_IRL12 (INT_NUM_IM3_IRL0 + 12)
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#define INT_NUM_IM3_IRL13 (INT_NUM_IM3_IRL0 + 13)
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#define INT_NUM_IM3_IRL14 (INT_NUM_IM3_IRL0 + 14)
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#define INT_NUM_IM3_IRL15 (INT_NUM_IM3_IRL0 + 15)
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#define INT_NUM_IM3_IRL16 (INT_NUM_IM3_IRL0 + 16)
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#define INT_NUM_IM3_IRL17 (INT_NUM_IM3_IRL0 + 17)
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#define INT_NUM_IM3_IRL18 (INT_NUM_IM3_IRL0 + 18)
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#define INT_NUM_IM3_IRL19 (INT_NUM_IM3_IRL0 + 19)
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#define INT_NUM_IM3_IRL20 (INT_NUM_IM3_IRL0 + 20)
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#define INT_NUM_IM3_IRL21 (INT_NUM_IM3_IRL0 + 21)
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#define INT_NUM_IM3_IRL22 (INT_NUM_IM3_IRL0 + 22)
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#define INT_NUM_IM3_IRL23 (INT_NUM_IM3_IRL0 + 23)
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#define INT_NUM_IM3_IRL24 (INT_NUM_IM3_IRL0 + 24)
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#define INT_NUM_IM3_IRL25 (INT_NUM_IM3_IRL0 + 25)
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#define INT_NUM_IM3_IRL26 (INT_NUM_IM3_IRL0 + 26)
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#define INT_NUM_IM3_IRL27 (INT_NUM_IM3_IRL0 + 27)
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#define INT_NUM_IM3_IRL28 (INT_NUM_IM3_IRL0 + 28)
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#define INT_NUM_IM3_IRL29 (INT_NUM_IM3_IRL0 + 29)
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#define INT_NUM_IM3_IRL30 (INT_NUM_IM3_IRL0 + 30)
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#define INT_NUM_IM3_IRL31 (INT_NUM_IM3_IRL0 + 31)
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#define INT_NUM_IM4_IRL0 (INT_NUM_IRQ0 + 128)
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#define INT_NUM_IM4_IRL1 (INT_NUM_IM4_IRL0 + 1)
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#define INT_NUM_IM4_IRL2 (INT_NUM_IM4_IRL0 + 2)
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#define INT_NUM_IM4_IRL3 (INT_NUM_IM4_IRL0 + 3)
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#define INT_NUM_IM4_IRL4 (INT_NUM_IM4_IRL0 + 4)
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#define INT_NUM_IM4_IRL5 (INT_NUM_IM4_IRL0 + 5)
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#define INT_NUM_IM4_IRL6 (INT_NUM_IM4_IRL0 + 6)
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#define INT_NUM_IM4_IRL7 (INT_NUM_IM4_IRL0 + 7)
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#define INT_NUM_IM4_IRL8 (INT_NUM_IM4_IRL0 + 8)
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#define INT_NUM_IM4_IRL9 (INT_NUM_IM4_IRL0 + 9)
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#define INT_NUM_IM4_IRL10 (INT_NUM_IM4_IRL0 + 10)
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#define INT_NUM_IM4_IRL11 (INT_NUM_IM4_IRL0 + 11)
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#define INT_NUM_IM4_IRL12 (INT_NUM_IM4_IRL0 + 12)
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#define INT_NUM_IM4_IRL13 (INT_NUM_IM4_IRL0 + 13)
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#define INT_NUM_IM4_IRL14 (INT_NUM_IM4_IRL0 + 14)
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#define INT_NUM_IM4_IRL15 (INT_NUM_IM4_IRL0 + 15)
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#define INT_NUM_IM4_IRL16 (INT_NUM_IM4_IRL0 + 16)
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#define INT_NUM_IM4_IRL17 (INT_NUM_IM4_IRL0 + 17)
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#define INT_NUM_IM4_IRL18 (INT_NUM_IM4_IRL0 + 18)
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#define INT_NUM_IM4_IRL19 (INT_NUM_IM4_IRL0 + 19)
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#define INT_NUM_IM4_IRL20 (INT_NUM_IM4_IRL0 + 20)
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#define INT_NUM_IM4_IRL21 (INT_NUM_IM4_IRL0 + 21)
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#define INT_NUM_IM4_IRL22 (INT_NUM_IM4_IRL0 + 22)
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#define INT_NUM_IM4_IRL23 (INT_NUM_IM4_IRL0 + 23)
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#define INT_NUM_IM4_IRL24 (INT_NUM_IM4_IRL0 + 24)
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#define INT_NUM_IM4_IRL25 (INT_NUM_IM4_IRL0 + 25)
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#define INT_NUM_IM4_IRL26 (INT_NUM_IM4_IRL0 + 26)
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#define INT_NUM_IM4_IRL27 (INT_NUM_IM4_IRL0 + 27)
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#define INT_NUM_IM4_IRL28 (INT_NUM_IM4_IRL0 + 28)
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#define INT_NUM_IM4_IRL29 (INT_NUM_IM4_IRL0 + 29)
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#define INT_NUM_IM4_IRL30 (INT_NUM_IM4_IRL0 + 30)
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#define INT_NUM_IM4_IRL31 (INT_NUM_IM4_IRL0 + 31)
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/****** Interrupt Assigments ***********/
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#define AMAZON_DMA_INT INT_NUM_IM0_IRL0
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#define IFX_SSC_TIR INT_NUM_IM0_IRL29
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#define IFX_SSC_RIR INT_NUM_IM0_IRL30
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#define IFX_SSC_EIR INT_NUM_IM0_IRL31
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#define AMAZON_MEI_INT INT_NUM_IM2_IRL8
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#define AMAZONASC_TIR INT_NUM_IM4_IRL15/* TX interrupt */
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#define AMAZONASC_RIR INT_NUM_IM4_IRL16/* RX interrupt */
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#define AMAZONASC_EIR INT_NUM_IM4_IRL17/* ERROR interrupt */
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#define AMAZON_TIMER6_INT INT_NUM_IM1_IRL23
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#define AMAZON_SWIE_INT INT_NUM_IM3_IRL8
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#define AMAZON_CBM_INT INT_NUM_IM3_IRL9
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#define AMAZON_AAL5_INT INT_NUM_IM3_IRL10
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#define AMAZON_HTU_INT INT_NUM_IM3_IRL11
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#define AMAZON_QSB_INT INT_NUM_IM3_IRL12
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#define MIPS_CPU_TIMER_IRQ 7
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#endif /* __AMAZON_IRQ */
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