mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-01 21:20:37 +02:00
e0b80e41eb
Tested on the following boards: ALFA AP96 TL-MR3220 v1 TL-WR1043ND v1 TL-WR2543ND v1 TL-WR703N v1 TL-WR741ND v1 TL-WR741ND v4 WNDR3700 v1 WZR-HP-G300NH git-svn-id: svn://svn.openwrt.org/openwrt/trunk@29868 3c298f89-4303-0410-b956-a3cf2f4a3e73
133 lines
3.8 KiB
Diff
133 lines
3.8 KiB
Diff
From db464f2ad82c03f847d8eabbb8251b5c567e6720 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Fri, 18 Nov 2011 11:52:41 +0100
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Subject: [PATCH 08/35] MIPS: ath79: use io-accessor macros in pci-ar724x.c
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Acked-by: René Bolldorf <xsecute@googlemail.com>
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v4: - add an Acked-by tag from René
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v3: - no changes
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v2: - no changes
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---
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arch/mips/pci/pci-ar724x.c | 38 ++++++++++++++++++++++++--------------
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1 files changed, 24 insertions(+), 14 deletions(-)
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--- a/arch/mips/pci/pci-ar724x.c
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+++ b/arch/mips/pci/pci-ar724x.c
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@@ -11,19 +11,19 @@
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#include <linux/pci.h>
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#include <asm/mach-ath79/pci.h>
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-#define reg_read(_phys) (*(unsigned int *) KSEG1ADDR(_phys))
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-#define reg_write(_phys, _val) ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))
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-
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-#define AR724X_PCI_DEV_BASE 0x14000000
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+#define AR724X_PCI_CFG_BASE 0x14000000
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+#define AR724X_PCI_CFG_SIZE 0x1000
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#define AR724X_PCI_MEM_BASE 0x10000000
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#define AR724X_PCI_MEM_SIZE 0x08000000
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static DEFINE_SPINLOCK(ar724x_pci_lock);
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+static void __iomem *ar724x_pci_devcfg_base;
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static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
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int size, uint32_t *value)
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{
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unsigned long flags, addr, tval, mask;
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+ void __iomem *base;
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if (devfn)
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return PCIBIOS_DEVICE_NOT_FOUND;
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@@ -31,25 +31,27 @@ static int ar724x_pci_read(struct pci_bu
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if (where & (size - 1))
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return PCIBIOS_BAD_REGISTER_NUMBER;
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+ base = ar724x_pci_devcfg_base;
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+
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spin_lock_irqsave(&ar724x_pci_lock, flags);
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switch (size) {
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case 1:
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addr = where & ~3;
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mask = 0xff000000 >> ((where % 4) * 8);
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- tval = reg_read(AR724X_PCI_DEV_BASE + addr);
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+ tval = __raw_readl(base + addr);
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tval = tval & ~mask;
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*value = (tval >> ((4 - (where % 4))*8));
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break;
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case 2:
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addr = where & ~3;
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mask = 0xffff0000 >> ((where % 4)*8);
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- tval = reg_read(AR724X_PCI_DEV_BASE + addr);
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+ tval = __raw_readl(base + addr);
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tval = tval & ~mask;
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*value = (tval >> ((4 - (where % 4))*8));
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break;
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case 4:
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- *value = reg_read(AR724X_PCI_DEV_BASE + where);
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+ *value = __raw_readl(base + where);
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break;
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default:
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spin_unlock_irqrestore(&ar724x_pci_lock, flags);
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@@ -66,6 +68,7 @@ static int ar724x_pci_write(struct pci_b
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int size, uint32_t value)
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{
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unsigned long flags, tval, addr, mask;
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+ void __iomem *base;
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if (devfn)
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return PCIBIOS_DEVICE_NOT_FOUND;
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@@ -73,27 +76,29 @@ static int ar724x_pci_write(struct pci_b
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if (where & (size - 1))
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return PCIBIOS_BAD_REGISTER_NUMBER;
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+ base = ar724x_pci_devcfg_base;
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+
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spin_lock_irqsave(&ar724x_pci_lock, flags);
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switch (size) {
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case 1:
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- addr = (AR724X_PCI_DEV_BASE + where) & ~3;
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+ addr = where & ~3;
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mask = 0xff000000 >> ((where % 4)*8);
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- tval = reg_read(addr);
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+ tval = __raw_readl(base + addr);
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tval = tval & ~mask;
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tval |= (value << ((4 - (where % 4))*8)) & mask;
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- reg_write(addr, tval);
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+ __raw_writel(tval, base + addr);
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break;
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case 2:
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- addr = (AR724X_PCI_DEV_BASE + where) & ~3;
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+ addr = where & ~3;
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mask = 0xffff0000 >> ((where % 4)*8);
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- tval = reg_read(addr);
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+ tval = __raw_readl(base + addr);
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tval = tval & ~mask;
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tval |= (value << ((4 - (where % 4))*8)) & mask;
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- reg_write(addr, tval);
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+ __raw_writel(tval, base + addr);
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break;
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case 4:
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- reg_write((AR724X_PCI_DEV_BASE + where), value);
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+ __raw_writel(value, (base + where));
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break;
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default:
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spin_unlock_irqrestore(&ar724x_pci_lock, flags);
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@@ -133,6 +138,11 @@ static struct pci_controller ar724x_pci_
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int __init ar724x_pcibios_init(void)
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{
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+ ar724x_pci_devcfg_base = ioremap(AR724X_PCI_CFG_BASE,
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+ AR724X_PCI_CFG_SIZE);
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+ if (ar724x_pci_devcfg_base == NULL)
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+ return -ENOMEM;
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+
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register_pci_controller(&ar724x_pci_controller);
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return PCIBIOS_SUCCESSFUL;
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