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mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-12-27 23:43:01 +02:00
openwrt-xburst/target/linux/brcm47xx/patches-2.6.28/220-bcm5354.patch
nbd 3b617e51cc add initial 2.6.28 support for brcm47xx target
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@13909 3c298f89-4303-0410-b956-a3cf2f4a3e73
2009-01-06 22:36:41 +00:00

46 lines
1.7 KiB
Diff

diff --git a/drivers/ssb/driver_chipcommon.c b/drivers/ssb/driver_chipcommon.c
--- a/drivers/ssb/driver_chipcommon.c
+++ b/drivers/ssb/driver_chipcommon.c
@@ -270,6 +270,8 @@ void ssb_chipco_resume(struct ssb_chipcommon *cc)
void ssb_chipco_get_clockcpu(struct ssb_chipcommon *cc,
u32 *plltype, u32 *n, u32 *m)
{
+ if ((chipco_read32(cc, SSB_CHIPCO_CHIPID) & SSB_CHIPCO_IDMASK) == 0x5354)
+ return;
*n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N);
*plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT);
switch (*plltype) {
@@ -293,6 +295,8 @@ void ssb_chipco_get_clockcpu(struct ssb_chipcommon *cc,
void ssb_chipco_get_clockcontrol(struct ssb_chipcommon *cc,
u32 *plltype, u32 *n, u32 *m)
{
+ if ((chipco_read32(cc, SSB_CHIPCO_CHIPID) & SSB_CHIPCO_IDMASK) == 0x5354)
+ return;
*n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N);
*plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT);
switch (*plltype) {
diff --git a/drivers/ssb/driver_mipscore.c b/drivers/ssb/driver_mipscore.c
--- a/drivers/ssb/driver_mipscore.c
+++ b/drivers/ssb/driver_mipscore.c
@@ -161,6 +161,8 @@ u32 ssb_cpu_clock(struct ssb_mipscore *mcore)
if ((pll_type == SSB_PLLTYPE_5) || (bus->chip_id == 0x5365)) {
rate = 200000000;
+ } else if (bus->chip_id == 0x5354) {
+ rate = 240000000;
} else {
rate = ssb_calc_clock_rate(pll_type, n, m);
}
diff --git a/drivers/ssb/main.c b/drivers/ssb/main.c
--- a/drivers/ssb/main.c
+++ b/drivers/ssb/main.c
@@ -1011,6 +1011,8 @@ u32 ssb_clockspeed(struct ssb_bus *bus)
if (bus->chip_id == 0x5365) {
rate = 100000000;
+ } else if (bus->chip_id == 0x5354) {
+ rate = 120000000;
} else {
rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */