mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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5a2708d192
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@30888 3c298f89-4303-0410-b956-a3cf2f4a3e73
77 lines
2.1 KiB
C
77 lines
2.1 KiB
C
/*
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* Ralink RT288x SoC specific definitions
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*
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* Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*
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* Parts of this file are based on Ralink's 2.6.21 BSP
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#ifndef _RT288X_H_
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#define _RT288X_H_
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#include <linux/init.h>
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#include <linux/io.h>
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#define RT288X_MEM_SIZE_MIN (2 * 1024 * 1024)
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#define RT288X_MEM_SIZE_MAX (128 * 1024 * 1024)
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#define RT288X_CPU_IRQ_BASE 0
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#define RT288X_INTC_IRQ_BASE 8
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#define RT288X_INTC_IRQ_COUNT 32
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#define RT288X_GPIO_IRQ_BASE 40
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#define RT288X_CPU_IRQ_INTC (RT288X_CPU_IRQ_BASE + 2)
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#define RT288X_CPU_IRQ_PCI (RT288X_CPU_IRQ_BASE + 4)
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#define RT288X_CPU_IRQ_FE (RT288X_CPU_IRQ_BASE + 5)
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#define RT288X_CPU_IRQ_WNIC (RT288X_CPU_IRQ_BASE + 6)
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#define RT288X_CPU_IRQ_COUNTER (RT288X_CPU_IRQ_BASE + 7)
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#define RT2880_INTC_IRQ_TIMER0 (RT288X_INTC_IRQ_BASE + 0)
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#define RT2880_INTC_IRQ_TIMER1 (RT288X_INTC_IRQ_BASE + 1)
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#define RT2880_INTC_IRQ_UART0 (RT288X_INTC_IRQ_BASE + 2)
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#define RT2880_INTC_IRQ_PIO (RT288X_INTC_IRQ_BASE + 3)
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#define RT2880_INTC_IRQ_PCM (RT288X_INTC_IRQ_BASE + 4)
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#define RT2880_INTC_IRQ_UART1 (RT288X_INTC_IRQ_BASE + 8)
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#define RT2880_INTC_IRQ_IA (RT288X_INTC_IRQ_BASE + 23)
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#define RT288X_GPIO_IRQ(x) (RT288X_GPIO_IRQ_BASE + (x))
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#define RT288X_GPIO_COUNT 32
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extern void __iomem *rt288x_sysc_base;
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extern void __iomem *rt288x_memc_base;
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static inline void rt288x_sysc_wr(u32 val, unsigned reg)
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{
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__raw_writel(val, rt288x_sysc_base + reg);
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}
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static inline u32 rt288x_sysc_rr(unsigned reg)
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{
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return __raw_readl(rt288x_sysc_base + reg);
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}
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static inline void rt288x_memc_wr(u32 val, unsigned reg)
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{
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__raw_writel(val, rt288x_memc_base + reg);
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}
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static inline u32 rt288x_memc_rr(unsigned reg)
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{
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return __raw_readl(rt288x_memc_base + reg);
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}
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void rt288x_gpio_init(u32 mode);
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#ifdef CONFIG_PCI
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int rt288x_register_pci(void);
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#else
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static inline int rt288x_register_pci(void) { return 0; }
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#endif /* CONFIG_PCI */
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#endif /* _RT228X_H_ */
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