juhosg a93b2c2dcd ar71xx: fix link speed between AR7242 and AR8327 on the RB750GL/RB751G boards ... The default pll_1000 value had to be changed in order to make it working. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33993 3c298f89-4303-0410-b956-a3cf2f4a3e73		2012-10-29 17:24:30 +00:00
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ath79	ar71xx: fix link speed between AR7242 and AR8327 on the RB750GL/RB751G boards	2012-10-29 17:24:30 +00:00
include/asm	ar71xx: add dynamic MDIO clock calculation	2012-09-09 14:05:17 +00:00