mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-25 13:31:44 +02:00
e617fcefcd
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@11848 3c298f89-4303-0410-b956-a3cf2f4a3e73
283 lines
7.4 KiB
Diff
283 lines
7.4 KiB
Diff
--- a/ath/if_ath.c
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+++ b/ath/if_ath.c
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@@ -1014,9 +1014,7 @@
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*/
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sc->sc_hasveol = ath_hal_hasveol(ah);
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- /* Interference mitigation/ambient noise immunity (ANI).
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- * In modes other than HAL_M_STA, it causes receive sensitivity
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- * problems for OFDM. */
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+ /* Interference mitigation/ambient noise immunity (ANI). */
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sc->sc_hasintmit = ath_hal_hasintmit(ah);
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/* get mac address from hardware */
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@@ -1144,6 +1142,11 @@
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sc->sc_rp_lasttsf = 0;
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sc->sc_last_tsf = 0;
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+ /* set all 3 to auto */
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+ sc->sc_intmit = -1;
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+ sc->sc_noise_immunity = -1;
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+ sc->sc_ofdm_weak_det = -1;
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+
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return 0;
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bad3:
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ieee80211_ifdetach(ic);
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@@ -2351,16 +2354,6 @@
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}
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if (status & HAL_INT_MIB) {
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sc->sc_stats.ast_mib++;
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- /* When the card receives lots of PHY errors, the MIB
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- * interrupt will fire at a very rapid rate. We will use
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- * a timer to enforce at least 1 jiffy delay between
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- * MIB interrupts. This should be unproblematic, since
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- * the hardware will continue to update the counters in
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- * the mean time. */
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- sc->sc_imask &= ~HAL_INT_MIB;
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- ath_hal_intrset(ah, sc->sc_imask);
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- mod_timer(&sc->sc_mib_enable, jiffies + 1);
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-
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/* Let the HAL handle the event. */
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ath_hal_mibevent(ah, &sc->sc_halstats);
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}
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@@ -2430,6 +2423,43 @@
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return flags;
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}
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+static int ath_setintmit(struct ath_softc *sc)
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+{
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+ struct ath_hal *ah = sc->sc_ah;
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+ int ret;
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+ int val;
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+
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+ if (!sc->sc_hasintmit)
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+ return 0;
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+
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+ switch(sc->sc_intmit) {
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+ case -1:
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+ if (sc->sc_opmode != IEEE80211_M_MONITOR)
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+ val = 1;
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+ else
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+ val = 0;
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+ break;
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+ case 0: /* disabled */
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+ case 1: /* enabled */
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+ val = sc->sc_intmit;
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+ break;
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+ default:
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+ return 0;
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+ }
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+ ret = ath_hal_setintmit(ah, val);
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+ if (val)
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+ goto done;
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+
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+ /* manual settings */
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+ if ((sc->sc_noise_immunity >= 0) && (sc->sc_noise_immunity <= 5))
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+ ath_hal_setcapability(ah, HAL_CAP_INTMIT, 2, sc->sc_noise_immunity, NULL);
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+ if ((sc->sc_ofdm_weak_det == 0) || (sc->sc_ofdm_weak_det == 1))
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+ ath_hal_setcapability(ah, HAL_CAP_INTMIT, 3, sc->sc_ofdm_weak_det, NULL);
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+
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+done:
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+ return ret;
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+}
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+
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/*
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* Context: process context
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*/
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@@ -2495,8 +2525,7 @@
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if (sc->sc_softled)
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ath_hal_gpioCfgOutput(ah, sc->sc_ledpin);
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- if ((sc->sc_opmode != HAL_M_STA) && sc->sc_hasintmit)
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- ath_hal_setintmit(ah, 0);
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+ ath_setintmit(sc);
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/*
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* This is needed only to setup initial state
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@@ -2532,7 +2561,7 @@
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* Enable MIB interrupts when there are hardware phy counters.
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* Note we only do this (at the moment) for station mode.
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*/
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- if (sc->sc_needmib && ic->ic_opmode == IEEE80211_M_STA)
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+ if (sc->sc_needmib && ath_hal_getintmit(ah, NULL))
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sc->sc_imask |= HAL_INT_MIB;
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ath_hal_intrset(ah, sc->sc_imask);
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@@ -2789,9 +2818,7 @@
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EPRINTF(sc, "Unable to reset hardware: '%s' (HAL status %u)\n",
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ath_get_hal_status_desc(status), status);
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- if ((sc->sc_opmode != HAL_M_STA) && sc->sc_hasintmit)
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- ath_hal_setintmit(ah, 0);
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-
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+ ath_setintmit(sc);
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ath_update_txpow(sc); /* update tx power state */
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ath_radar_update(sc);
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ath_setdefantenna(sc, sc->sc_defant);
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@@ -4173,6 +4200,8 @@
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if (sc->sc_nmonvaps > 0)
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rfilt |= (HAL_RX_FILTER_CONTROL | HAL_RX_FILTER_BEACON |
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HAL_RX_FILTER_PROBEREQ | HAL_RX_FILTER_PROM);
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+ if (sc->sc_hasintmit && !sc->sc_needmib && ath_hal_getintmit(ah, NULL))
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+ rfilt |= HAL_RX_FILTER_PHYERR;
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if (sc->sc_curchan.privFlags & CHANNEL_DFS)
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rfilt |= (HAL_RX_FILTER_PHYERR | HAL_RX_FILTER_PHYRADAR);
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return rfilt;
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@@ -6523,9 +6552,6 @@
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rs->rs_rssi = 0;
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len = rs->rs_datalen;
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- /* DMA sync. dies spectacularly if len == 0 */
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- if (len == 0)
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- goto rx_next;
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if (rs->rs_more) {
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/*
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@@ -8877,9 +8903,7 @@
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if (sc->sc_softled)
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ath_hal_gpioCfgOutput(ah, sc->sc_ledpin);
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- if ((sc->sc_opmode != HAL_M_STA) && sc->sc_hasintmit)
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- ath_hal_setintmit(ah, 0);
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-
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+ ath_setintmit(sc);
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sc->sc_curchan = hchan;
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ath_update_txpow(sc); /* update tx power state */
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ath_radar_update(sc);
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@@ -10656,9 +10680,54 @@
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ATH_RP_IGNORED = 24,
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ATH_RADAR_IGNORED = 25,
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ATH_MAXVAPS = 26,
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+ ATH_INTMIT = 27,
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+ ATH_NOISE_IMMUNITY = 28,
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+ ATH_OFDM_WEAK_DET = 29
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};
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static int
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+ath_sysctl_set_intmit(struct ath_softc *sc, long ctl, u_int val)
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+{
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+ int ret;
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+
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+ switch(ctl) {
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+ case ATH_INTMIT:
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+ sc->sc_intmit = val;
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+ break;
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+ case ATH_NOISE_IMMUNITY:
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+ sc->sc_noise_immunity = val;
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+ break;
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+ case ATH_OFDM_WEAK_DET:
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+ sc->sc_ofdm_weak_det = val;
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+ break;
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+ default:
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+ return -EINVAL;
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+ }
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+ ret = ath_setintmit(sc);
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+ ath_calcrxfilter(sc);
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+ return ret;
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+}
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+
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+static int
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+ath_sysctl_get_intmit(struct ath_softc *sc, long ctl, u_int *val)
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+{
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+ struct ath_hal *ah = sc->sc_ah;
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+
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+ switch(ctl) {
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+ case ATH_INTMIT:
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+ *val = (ath_hal_getcapability(ah, HAL_CAP_INTMIT, 1, NULL) == HAL_OK);
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+ break;
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+ case ATH_NOISE_IMMUNITY:
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+ return ath_hal_getcapability(ah, HAL_CAP_INTMIT, 2, val);
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+ case ATH_OFDM_WEAK_DET:
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+ return ath_hal_getcapability(ah, HAL_CAP_INTMIT, 3, val);
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+ default:
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+ return -EINVAL;
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+ }
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+ return 0;
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+}
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+
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+static int
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ATH_SYSCTL_DECL(ath_sysctl_halparam, ctl, write, filp, buffer, lenp, ppos)
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{
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struct ath_softc *sc = ctl->extra1;
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@@ -10844,6 +10913,11 @@
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case ATH_RADAR_IGNORED:
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sc->sc_radar_ignored = val;
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break;
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+ case ATH_INTMIT:
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+ case ATH_NOISE_IMMUNITY:
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+ case ATH_OFDM_WEAK_DET:
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+ ret = ath_sysctl_set_intmit(sc, (long)ctl->extra2, val);
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+ break;
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default:
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ret = -EINVAL;
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break;
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@@ -10910,6 +10984,11 @@
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case ATH_RADAR_IGNORED:
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val = sc->sc_radar_ignored;
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break;
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+ case ATH_INTMIT:
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+ case ATH_NOISE_IMMUNITY:
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+ case ATH_OFDM_WEAK_DET:
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+ ret = ath_sysctl_get_intmit(sc, (long)ctl->extra2, &val);
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+ break;
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default:
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ret = -EINVAL;
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break;
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@@ -11087,6 +11166,24 @@
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.proc_handler = ath_sysctl_halparam,
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.extra2 = (void *)ATH_RADAR_IGNORED,
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},
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+ { .ctl_name = CTL_AUTO,
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+ .procname = "intmit",
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+ .mode = 0644,
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+ .proc_handler = ath_sysctl_halparam,
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+ .extra2 = (void *)ATH_INTMIT,
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+ },
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+ { .ctl_name = CTL_AUTO,
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+ .procname = "noise_immunity",
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+ .mode = 0644,
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+ .proc_handler = ath_sysctl_halparam,
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+ .extra2 = (void *)ATH_NOISE_IMMUNITY,
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+ },
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+ { .ctl_name = CTL_AUTO,
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+ .procname = "ofdm_weak_det",
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+ .mode = 0644,
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+ .proc_handler = ath_sysctl_halparam,
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+ .extra2 = (void *)ATH_OFDM_WEAK_DET,
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+ },
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{ 0 }
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};
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--- a/ath/if_athvar.h
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+++ b/ath/if_athvar.h
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@@ -693,6 +693,10 @@
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unsigned int sc_txcont_power; /* Continuous transmit power in 0.5dBm units */
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unsigned int sc_txcont_rate; /* Continuous transmit rate in Mbps */
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+ int8_t sc_intmit; /* Interference mitigation enabled, -1 = auto, based on mode, 0/1 = off/on */
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+ int8_t sc_noise_immunity; /* Noise immunity level, 0-4, -1 == auto) */
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+ int8_t sc_ofdm_weak_det; /* OFDM weak frames detection, -1 == auto */
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+
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/* rate tables */
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const HAL_RATE_TABLE *sc_rates[IEEE80211_MODE_MAX];
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const HAL_RATE_TABLE *sc_currates; /* current rate table */
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--- a/ath/if_ath_hal.h
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+++ b/ath/if_ath_hal.h
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@@ -67,14 +67,14 @@
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static inline HAL_BOOL ath_hal_getdiagstate(struct ath_hal *ah, int request,
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const void *args, u_int32_t argsize,
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- void **result,
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+ void *result,
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u_int32_t *resultsize)
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{
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HAL_BOOL ret;
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ATH_HAL_LOCK_IRQ(ah->ah_sc);
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ath_hal_set_function(__func__);
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ret =
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- ah->ah_getDiagState(ah, request, args, argsize, *result,
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+ ah->ah_getDiagState(ah, request, args, argsize, result,
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resultsize);
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ath_hal_set_function(NULL);
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ATH_HAL_UNLOCK_IRQ(ah->ah_sc);
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