mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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4f531230a3
openwrt. this gives us the ability to better support different hardware models, without changing any external tar-balls. only et.o and wl.o is missing and is fetched from my webserver. git-svn-id: svn://svn.openwrt.org/openwrt/trunk/openwrt@379 3c298f89-4303-0410-b956-a3cf2f4a3e73
267 lines
7.2 KiB
C
267 lines
7.2 KiB
C
/*
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* BCM4710 specific pcmcia routines.
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*
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* Copyright 2004, Broadcom Corporation
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* All Rights Reserved.
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*
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* THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
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* KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
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* SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
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*
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* $Id$
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/config.h>
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#include <linux/delay.h>
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#include <linux/ioport.h>
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#include <linux/kernel.h>
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#include <linux/tqueue.h>
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#include <linux/timer.h>
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#include <linux/mm.h>
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#include <linux/proc_fs.h>
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#include <linux/version.h>
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <pcmcia/version.h>
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#include <pcmcia/cs_types.h>
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#include <pcmcia/cs.h>
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#include <pcmcia/ss.h>
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#include <pcmcia/bulkmem.h>
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#include <pcmcia/cistpl.h>
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#include <pcmcia/bus_ops.h>
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#include "cs_internal.h"
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/system.h>
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#include <typedefs.h>
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#include <bcmdevs.h>
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#include <bcm4710.h>
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#include <sbconfig.h>
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#include <sbextif.h>
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#include "bcm4710pcmcia.h"
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/* Use a static var for irq dev_id */
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static int bcm47xx_pcmcia_dev_id;
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/* Do we think we have a card or not? */
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static int bcm47xx_pcmcia_present = 0;
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static void bcm4710_pcmcia_reset(void)
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{
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extifregs_t *eir;
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unsigned long s;
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uint32 out0, out1, outen;
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eir = (extifregs_t *) ioremap_nocache(BCM4710_REG_EXTIF, sizeof(extifregs_t));
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save_and_cli(s);
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/* Use gpio7 to reset the pcmcia slot */
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outen = readl(&eir->gpio[0].outen);
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outen |= BCM47XX_PCMCIA_RESET;
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out0 = readl(&eir->gpio[0].out);
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out0 &= ~(BCM47XX_PCMCIA_RESET);
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out1 = out0 | BCM47XX_PCMCIA_RESET;
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writel(out0, &eir->gpio[0].out);
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writel(outen, &eir->gpio[0].outen);
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mdelay(1);
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writel(out1, &eir->gpio[0].out);
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mdelay(1);
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writel(out0, &eir->gpio[0].out);
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restore_flags(s);
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}
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static int bcm4710_pcmcia_init(struct pcmcia_init *init)
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{
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struct pci_dev *pdev;
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extifregs_t *eir;
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uint32 outen, intp, intm, tmp;
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uint16 *attrsp;
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int rc = 0, i;
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extern unsigned long bcm4710_cpu_cycle;
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if (!(pdev = pci_find_device(VENDOR_BROADCOM, SB_EXTIF, NULL))) {
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printk(KERN_ERR "bcm4710_pcmcia: extif not found\n");
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return -ENODEV;
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}
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eir = (extifregs_t *) ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
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/* Initialize the pcmcia i/f: 16bit no swap */
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writel(CF_EM_PCMCIA | CF_DS | CF_EN, &eir->pcmcia_config);
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#ifdef notYet
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/* Set the timing for memory accesses */
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tmp = (19 / bcm4710_cpu_cycle) << 24; /* W3 = 10nS */
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tmp = tmp | ((29 / bcm4710_cpu_cycle) << 16); /* W2 = 20nS */
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tmp = tmp | ((109 / bcm4710_cpu_cycle) << 8); /* W1 = 100nS */
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tmp = tmp | (129 / bcm4710_cpu_cycle); /* W0 = 120nS */
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writel(tmp, &eir->pcmcia_memwait); /* 0x01020a0c for a 100Mhz clock */
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/* Set the timing for I/O accesses */
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tmp = (19 / bcm4710_cpu_cycle) << 24; /* W3 = 10nS */
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tmp = tmp | ((29 / bcm4710_cpu_cycle) << 16); /* W2 = 20nS */
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tmp = tmp | ((109 / bcm4710_cpu_cycle) << 8); /* W1 = 100nS */
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tmp = tmp | (129 / bcm4710_cpu_cycle); /* W0 = 120nS */
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writel(tmp, &eir->pcmcia_iowait); /* 0x01020a0c for a 100Mhz clock */
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/* Set the timing for attribute accesses */
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tmp = (19 / bcm4710_cpu_cycle) << 24; /* W3 = 10nS */
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tmp = tmp | ((29 / bcm4710_cpu_cycle) << 16); /* W2 = 20nS */
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tmp = tmp | ((109 / bcm4710_cpu_cycle) << 8); /* W1 = 100nS */
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tmp = tmp | (129 / bcm4710_cpu_cycle); /* W0 = 120nS */
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writel(tmp, &eir->pcmcia_attrwait); /* 0x01020a0c for a 100Mhz clock */
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#endif
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/* Make sure gpio0 and gpio5 are inputs */
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outen = readl(&eir->gpio[0].outen);
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outen &= ~(BCM47XX_PCMCIA_WP | BCM47XX_PCMCIA_STSCHG | BCM47XX_PCMCIA_RESET);
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writel(outen, &eir->gpio[0].outen);
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/* Issue a reset to the pcmcia socket */
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bcm4710_pcmcia_reset();
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#ifdef DO_BCM47XX_PCMCIA_INTERRUPTS
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/* Setup gpio5 to be the STSCHG interrupt */
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intp = readl(&eir->gpiointpolarity);
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writel(intp | BCM47XX_PCMCIA_STSCHG, &eir->gpiointpolarity); /* Active low */
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intm = readl(&eir->gpiointmask);
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writel(intm | BCM47XX_PCMCIA_STSCHG, &eir->gpiointmask); /* Enable it */
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#endif
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DEBUG(2, "bcm4710_pcmcia after reset:\n");
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DEBUG(2, "\textstatus\t= 0x%08x:\n", readl(&eir->extstatus));
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DEBUG(2, "\tpcmcia_config\t= 0x%08x:\n", readl(&eir->pcmcia_config));
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DEBUG(2, "\tpcmcia_memwait\t= 0x%08x:\n", readl(&eir->pcmcia_memwait));
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DEBUG(2, "\tpcmcia_attrwait\t= 0x%08x:\n", readl(&eir->pcmcia_attrwait));
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DEBUG(2, "\tpcmcia_iowait\t= 0x%08x:\n", readl(&eir->pcmcia_iowait));
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DEBUG(2, "\tgpioin\t\t= 0x%08x:\n", readl(&eir->gpioin));
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DEBUG(2, "\tgpio_outen0\t= 0x%08x:\n", readl(&eir->gpio[0].outen));
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DEBUG(2, "\tgpio_out0\t= 0x%08x:\n", readl(&eir->gpio[0].out));
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DEBUG(2, "\tgpiointpolarity\t= 0x%08x:\n", readl(&eir->gpiointpolarity));
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DEBUG(2, "\tgpiointmask\t= 0x%08x:\n", readl(&eir->gpiointmask));
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#ifdef DO_BCM47XX_PCMCIA_INTERRUPTS
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/* Request pcmcia interrupt */
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rc = request_irq(BCM47XX_PCMCIA_IRQ, init->handler, SA_INTERRUPT,
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"PCMCIA Interrupt", &bcm47xx_pcmcia_dev_id);
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#endif
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attrsp = (uint16 *)ioremap_nocache(EXTIF_PCMCIA_CFGBASE(BCM4710_EXTIF), 0x1000);
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tmp = readw(&attrsp[0]);
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DEBUG(2, "\tattr[0] = 0x%04x\n", tmp);
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if ((tmp == 0x7fff) || (tmp == 0x7f00)) {
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bcm47xx_pcmcia_present = 0;
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} else {
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bcm47xx_pcmcia_present = 1;
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}
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/* There's only one socket */
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return 1;
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}
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static int bcm4710_pcmcia_shutdown(void)
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{
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extifregs_t *eir;
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uint32 intm;
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eir = (extifregs_t *) ioremap_nocache(BCM4710_REG_EXTIF, sizeof(extifregs_t));
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/* Disable the pcmcia i/f */
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writel(0, &eir->pcmcia_config);
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/* Reset gpio's */
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intm = readl(&eir->gpiointmask);
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writel(intm & ~BCM47XX_PCMCIA_STSCHG, &eir->gpiointmask); /* Disable it */
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free_irq(BCM47XX_PCMCIA_IRQ, &bcm47xx_pcmcia_dev_id);
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return 0;
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}
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static int
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bcm4710_pcmcia_socket_state(unsigned sock, struct pcmcia_state *state)
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{
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extifregs_t *eir;
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eir = (extifregs_t *) ioremap_nocache(BCM4710_REG_EXTIF, sizeof(extifregs_t));
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if (sock != 0) {
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printk(KERN_ERR "bcm4710 socket_state bad sock %d\n", sock);
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return -1;
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}
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if (bcm47xx_pcmcia_present) {
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state->detect = 1;
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state->ready = 1;
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state->bvd1 = 1;
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state->bvd2 = 1;
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state->wrprot = (readl(&eir->gpioin) & BCM47XX_PCMCIA_WP) == BCM47XX_PCMCIA_WP;
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state->vs_3v = 0;
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state->vs_Xv = 0;
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} else {
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state->detect = 0;
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state->ready = 0;
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}
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return 1;
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}
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static int bcm4710_pcmcia_get_irq_info(struct pcmcia_irq_info *info)
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{
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if (info->sock >= BCM47XX_PCMCIA_MAX_SOCK) return -1;
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info->irq = BCM47XX_PCMCIA_IRQ;
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return 0;
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}
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static int
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bcm4710_pcmcia_configure_socket(const struct pcmcia_configure *configure)
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{
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if (configure->sock >= BCM47XX_PCMCIA_MAX_SOCK) return -1;
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DEBUG(2, "Vcc %dV Vpp %dV output %d speaker %d reset %d\n", configure->vcc,
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configure->vpp, configure->output, configure->speaker, configure->reset);
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if ((configure->vcc != 50) || (configure->vpp != 50)) {
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printk("%s: bad Vcc/Vpp (%d:%d)\n", __FUNCTION__, configure->vcc,
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configure->vpp);
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}
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if (configure->reset) {
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/* Issue a reset to the pcmcia socket */
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DEBUG(1, "%s: Reseting socket\n", __FUNCTION__);
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bcm4710_pcmcia_reset();
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}
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return 0;
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}
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struct pcmcia_low_level bcm4710_pcmcia_ops = {
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bcm4710_pcmcia_init,
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bcm4710_pcmcia_shutdown,
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bcm4710_pcmcia_socket_state,
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bcm4710_pcmcia_get_irq_info,
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bcm4710_pcmcia_configure_socket
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};
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