mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-05 18:49:43 +02:00
e93015c4d4
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@14675 3c298f89-4303-0410-b956-a3cf2f4a3e73
495 lines
14 KiB
Diff
495 lines
14 KiB
Diff
Clean up the eeprom parsing code and prepare the pdgain
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data for 2413, which will be required for power calibration code.
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Also clean up some ugly line wrapping to make the code easier on
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the eyes.
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
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--- a/drivers/net/wireless/ath5k/eeprom.c
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+++ b/drivers/net/wireless/ath5k/eeprom.c
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@@ -541,31 +541,30 @@ ath5k_eeprom_read_freq_list(struct ath5k
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{
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struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
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int o = *offset;
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- int i = 0;
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+ int i = 0 ;
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u8 freq1, freq2;
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int ret;
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u16 val;
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+ ee->ee_n_piers[mode] = 0;
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while(i < max) {
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AR5K_EEPROM_READ(o++, val);
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- freq1 = (val >> 8) & 0xff;
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- freq2 = val & 0xff;
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+ freq1 = val & 0xff;
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+ if (!freq1)
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+ break;
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- if (freq1) {
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- pc[i++].freq = ath5k_eeprom_bin2freq(ee,
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- freq1, mode);
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- ee->ee_n_piers[mode]++;
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- }
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+ pc[i++].freq = ath5k_eeprom_bin2freq(ee,
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+ freq1, mode);
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+ ee->ee_n_piers[mode]++;
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- if (freq2) {
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- pc[i++].freq = ath5k_eeprom_bin2freq(ee,
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- freq2, mode);
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- ee->ee_n_piers[mode]++;
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- }
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-
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- if (!freq1 || !freq2)
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+ freq2 = (val >> 8) & 0xff;
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+ if (!freq2)
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break;
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+
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+ pc[i++].freq = ath5k_eeprom_bin2freq(ee,
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+ freq2, mode);
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+ ee->ee_n_piers[mode]++;
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}
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/* return new offset */
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@@ -918,84 +917,46 @@ ath5k_cal_data_offset_2413(struct ath5k_
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* curves on eeprom. The final curve (higher power) has an extra
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* point for better accuracy like RF5112.
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*/
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+
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static int
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-ath5k_eeprom_read_pcal_info_2413(struct ath5k_hw *ah, int mode)
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+ath5k_eeprom_parse_pcal_info_2413(struct ath5k_hw *ah, int mode, u32 offset,
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+ struct ath5k_chan_pcal_info *chinfo)
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{
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struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
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- struct ath5k_chan_pcal_info_rf2413 *chan_pcal_info;
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- struct ath5k_chan_pcal_info *gen_chan_info;
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- unsigned int i, c;
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- u32 offset;
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+ struct ath5k_chan_pcal_info_rf2413 *pcinfo;
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+ unsigned int i;
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int ret;
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u16 val;
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- u8 pd_gains = 0;
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-
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- if (ee->ee_x_gain[mode] & 0x1) pd_gains++;
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- if ((ee->ee_x_gain[mode] >> 1) & 0x1) pd_gains++;
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- if ((ee->ee_x_gain[mode] >> 2) & 0x1) pd_gains++;
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- if ((ee->ee_x_gain[mode] >> 3) & 0x1) pd_gains++;
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- ee->ee_pd_gains[mode] = pd_gains;
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-
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- offset = ath5k_cal_data_offset_2413(ee, mode);
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- ee->ee_n_piers[mode] = 0;
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- switch (mode) {
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- case AR5K_EEPROM_MODE_11A:
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- if (!AR5K_EEPROM_HDR_11A(ee->ee_header))
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- return 0;
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-
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- ath5k_eeprom_init_11a_pcal_freq(ah, offset);
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- offset += AR5K_EEPROM_N_5GHZ_CHAN / 2;
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- gen_chan_info = ee->ee_pwr_cal_a;
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- break;
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- case AR5K_EEPROM_MODE_11B:
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- if (!AR5K_EEPROM_HDR_11B(ee->ee_header))
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- return 0;
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+ u8 pd_gains;
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- ath5k_eeprom_init_11bg_2413(ah, mode, offset);
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- offset += AR5K_EEPROM_N_2GHZ_CHAN_2413 / 2;
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- gen_chan_info = ee->ee_pwr_cal_b;
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- break;
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- case AR5K_EEPROM_MODE_11G:
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- if (!AR5K_EEPROM_HDR_11G(ee->ee_header))
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- return 0;
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-
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- ath5k_eeprom_init_11bg_2413(ah, mode, offset);
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- offset += AR5K_EEPROM_N_2GHZ_CHAN_2413 / 2;
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- gen_chan_info = ee->ee_pwr_cal_g;
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- break;
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- default:
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- return -EINVAL;
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- }
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+ pd_gains = ee->ee_pd_gains[mode];
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if (pd_gains == 0)
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return 0;
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for (i = 0; i < ee->ee_n_piers[mode]; i++) {
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- chan_pcal_info = &gen_chan_info[i].rf2413_info;
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+ pcinfo = &chinfo[i].rf2413_info;
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/*
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* Read pwr_i, pddac_i and the first
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* 2 pd points (pwr, pddac)
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*/
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AR5K_EEPROM_READ(offset++, val);
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- chan_pcal_info->pwr_i[0] = val & 0x1f;
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- chan_pcal_info->pddac_i[0] = (val >> 5) & 0x7f;
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- chan_pcal_info->pwr[0][0] =
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- (val >> 12) & 0xf;
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+ pcinfo->pwr_i[0] = val & 0x1f;
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+ pcinfo->pddac_i[0] = (val >> 5) & 0x7f;
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+ pcinfo->pwr[0][0] = (val >> 12) & 0xf;
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AR5K_EEPROM_READ(offset++, val);
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- chan_pcal_info->pddac[0][0] = val & 0x3f;
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- chan_pcal_info->pwr[0][1] = (val >> 6) & 0xf;
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- chan_pcal_info->pddac[0][1] =
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- (val >> 10) & 0x3f;
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+ pcinfo->pddac[0][0] = val & 0x3f;
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+ pcinfo->pwr[0][1] = (val >> 6) & 0xf;
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+ pcinfo->pddac[0][1] = (val >> 10) & 0x3f;
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AR5K_EEPROM_READ(offset++, val);
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- chan_pcal_info->pwr[0][2] = val & 0xf;
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- chan_pcal_info->pddac[0][2] =
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- (val >> 4) & 0x3f;
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+ pcinfo->pwr[0][2] = val & 0xf;
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+ pcinfo->pddac[0][2] = (val >> 4) & 0x3f;
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- chan_pcal_info->pwr[0][3] = 0;
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- chan_pcal_info->pddac[0][3] = 0;
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+ pcinfo->pwr[0][3] = 0;
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+ pcinfo->pddac[0][3] = 0;
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if (pd_gains > 1) {
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/*
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@@ -1003,44 +964,36 @@ ath5k_eeprom_read_pcal_info_2413(struct
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* so it only has 2 pd points.
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* Continue wih pd gain 1.
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*/
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- chan_pcal_info->pwr_i[1] = (val >> 10) & 0x1f;
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+ pcinfo->pwr_i[1] = (val >> 10) & 0x1f;
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- chan_pcal_info->pddac_i[1] = (val >> 15) & 0x1;
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+ pcinfo->pddac_i[1] = (val >> 15) & 0x1;
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AR5K_EEPROM_READ(offset++, val);
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- chan_pcal_info->pddac_i[1] |= (val & 0x3F) << 1;
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+ pcinfo->pddac_i[1] |= (val & 0x3F) << 1;
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- chan_pcal_info->pwr[1][0] = (val >> 6) & 0xf;
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- chan_pcal_info->pddac[1][0] =
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- (val >> 10) & 0x3f;
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+ pcinfo->pwr[1][0] = (val >> 6) & 0xf;
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+ pcinfo->pddac[1][0] = (val >> 10) & 0x3f;
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AR5K_EEPROM_READ(offset++, val);
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- chan_pcal_info->pwr[1][1] = val & 0xf;
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- chan_pcal_info->pddac[1][1] =
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- (val >> 4) & 0x3f;
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- chan_pcal_info->pwr[1][2] =
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- (val >> 10) & 0xf;
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+ pcinfo->pwr[1][1] = val & 0xf;
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+ pcinfo->pddac[1][1] = (val >> 4) & 0x3f;
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+ pcinfo->pwr[1][2] = (val >> 10) & 0xf;
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- chan_pcal_info->pddac[1][2] =
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- (val >> 14) & 0x3;
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+ pcinfo->pddac[1][2] = (val >> 14) & 0x3;
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AR5K_EEPROM_READ(offset++, val);
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- chan_pcal_info->pddac[1][2] |=
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- (val & 0xF) << 2;
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+ pcinfo->pddac[1][2] |= (val & 0xF) << 2;
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- chan_pcal_info->pwr[1][3] = 0;
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- chan_pcal_info->pddac[1][3] = 0;
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+ pcinfo->pwr[1][3] = 0;
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+ pcinfo->pddac[1][3] = 0;
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} else if (pd_gains == 1) {
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/*
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* Pd gain 0 is the last one so
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* read the extra point.
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*/
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- chan_pcal_info->pwr[0][3] =
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- (val >> 10) & 0xf;
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+ pcinfo->pwr[0][3] = (val >> 10) & 0xf;
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- chan_pcal_info->pddac[0][3] =
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- (val >> 14) & 0x3;
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+ pcinfo->pddac[0][3] = (val >> 14) & 0x3;
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AR5K_EEPROM_READ(offset++, val);
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- chan_pcal_info->pddac[0][3] |=
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- (val & 0xF) << 2;
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+ pcinfo->pddac[0][3] |= (val & 0xF) << 2;
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}
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/*
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@@ -1048,105 +1001,159 @@ ath5k_eeprom_read_pcal_info_2413(struct
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* as above.
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*/
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if (pd_gains > 2) {
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- chan_pcal_info->pwr_i[2] = (val >> 4) & 0x1f;
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- chan_pcal_info->pddac_i[2] = (val >> 9) & 0x7f;
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+ pcinfo->pwr_i[2] = (val >> 4) & 0x1f;
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+ pcinfo->pddac_i[2] = (val >> 9) & 0x7f;
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AR5K_EEPROM_READ(offset++, val);
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- chan_pcal_info->pwr[2][0] =
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- (val >> 0) & 0xf;
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- chan_pcal_info->pddac[2][0] =
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- (val >> 4) & 0x3f;
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- chan_pcal_info->pwr[2][1] =
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- (val >> 10) & 0xf;
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-
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- chan_pcal_info->pddac[2][1] =
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- (val >> 14) & 0x3;
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- AR5K_EEPROM_READ(offset++, val);
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- chan_pcal_info->pddac[2][1] |=
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- (val & 0xF) << 2;
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-
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- chan_pcal_info->pwr[2][2] =
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- (val >> 4) & 0xf;
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- chan_pcal_info->pddac[2][2] =
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- (val >> 8) & 0x3f;
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+ pcinfo->pwr[2][0] = (val >> 0) & 0xf;
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+ pcinfo->pddac[2][0] = (val >> 4) & 0x3f;
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+ pcinfo->pwr[2][1] = (val >> 10) & 0xf;
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- chan_pcal_info->pwr[2][3] = 0;
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- chan_pcal_info->pddac[2][3] = 0;
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+ pcinfo->pddac[2][1] = (val >> 14) & 0x3;
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+ AR5K_EEPROM_READ(offset++, val);
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+ pcinfo->pddac[2][1] |= (val & 0xF) << 2;
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+
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+ pcinfo->pwr[2][2] = (val >> 4) & 0xf;
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+ pcinfo->pddac[2][2] = (val >> 8) & 0x3f;
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+
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+ pcinfo->pwr[2][3] = 0;
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+ pcinfo->pddac[2][3] = 0;
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} else if (pd_gains == 2) {
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- chan_pcal_info->pwr[1][3] =
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- (val >> 4) & 0xf;
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- chan_pcal_info->pddac[1][3] =
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- (val >> 8) & 0x3f;
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+ pcinfo->pwr[1][3] = (val >> 4) & 0xf;
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+ pcinfo->pddac[1][3] = (val >> 8) & 0x3f;
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}
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if (pd_gains > 3) {
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- chan_pcal_info->pwr_i[3] = (val >> 14) & 0x3;
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+ pcinfo->pwr_i[3] = (val >> 14) & 0x3;
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AR5K_EEPROM_READ(offset++, val);
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- chan_pcal_info->pwr_i[3] |= ((val >> 0) & 0x7) << 2;
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+ pcinfo->pwr_i[3] |= ((val >> 0) & 0x7) << 2;
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- chan_pcal_info->pddac_i[3] = (val >> 3) & 0x7f;
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- chan_pcal_info->pwr[3][0] =
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- (val >> 10) & 0xf;
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- chan_pcal_info->pddac[3][0] =
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- (val >> 14) & 0x3;
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+ pcinfo->pddac_i[3] = (val >> 3) & 0x7f;
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+ pcinfo->pwr[3][0] = (val >> 10) & 0xf;
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+ pcinfo->pddac[3][0] = (val >> 14) & 0x3;
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AR5K_EEPROM_READ(offset++, val);
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- chan_pcal_info->pddac[3][0] |=
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- (val & 0xF) << 2;
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- chan_pcal_info->pwr[3][1] =
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- (val >> 4) & 0xf;
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- chan_pcal_info->pddac[3][1] =
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- (val >> 8) & 0x3f;
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+ pcinfo->pddac[3][0] |= (val & 0xF) << 2;
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+ pcinfo->pwr[3][1] = (val >> 4) & 0xf;
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+ pcinfo->pddac[3][1] = (val >> 8) & 0x3f;
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- chan_pcal_info->pwr[3][2] =
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- (val >> 14) & 0x3;
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+ pcinfo->pwr[3][2] = (val >> 14) & 0x3;
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AR5K_EEPROM_READ(offset++, val);
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- chan_pcal_info->pwr[3][2] |=
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- ((val >> 0) & 0x3) << 2;
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+ pcinfo->pwr[3][2] |= ((val >> 0) & 0x3) << 2;
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- chan_pcal_info->pddac[3][2] =
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- (val >> 2) & 0x3f;
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- chan_pcal_info->pwr[3][3] =
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- (val >> 8) & 0xf;
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+ pcinfo->pddac[3][2] = (val >> 2) & 0x3f;
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+ pcinfo->pwr[3][3] = (val >> 8) & 0xf;
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- chan_pcal_info->pddac[3][3] =
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- (val >> 12) & 0xF;
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+ pcinfo->pddac[3][3] = (val >> 12) & 0xF;
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AR5K_EEPROM_READ(offset++, val);
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- chan_pcal_info->pddac[3][3] |=
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- ((val >> 0) & 0x3) << 4;
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+ pcinfo->pddac[3][3] |= ((val >> 0) & 0x3) << 4;
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} else if (pd_gains == 3) {
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- chan_pcal_info->pwr[2][3] =
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- (val >> 14) & 0x3;
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+ pcinfo->pwr[2][3] = (val >> 14) & 0x3;
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AR5K_EEPROM_READ(offset++, val);
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- chan_pcal_info->pwr[2][3] |=
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- ((val >> 0) & 0x3) << 2;
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+ pcinfo->pwr[2][3] |= ((val >> 0) & 0x3) << 2;
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- chan_pcal_info->pddac[2][3] =
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- (val >> 2) & 0x3f;
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+ pcinfo->pddac[2][3] = (val >> 2) & 0x3f;
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}
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+ }
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+ return 0;
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+}
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+
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+static int
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+ath5k_eeprom_convert_pcal_info_2413(struct ath5k_hw *ah, int mode,
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+ struct ath5k_chan_pcal_info *chinfo,
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+ unsigned int *xgains)
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+{
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+ struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
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+ struct ath5k_chan_pcal_info_rf2413 *pcinfo;
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+ unsigned int i, j, k;
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- for (c = 0; c < pd_gains; c++) {
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- /* Recreate pwr table for this channel using pwr steps */
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- chan_pcal_info->pwr[c][0] += chan_pcal_info->pwr_i[c] * 2;
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- chan_pcal_info->pwr[c][1] += chan_pcal_info->pwr[c][0];
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- chan_pcal_info->pwr[c][2] += chan_pcal_info->pwr[c][1];
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- chan_pcal_info->pwr[c][3] += chan_pcal_info->pwr[c][2];
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- if (chan_pcal_info->pwr[c][3] == chan_pcal_info->pwr[c][2])
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- chan_pcal_info->pwr[c][3] = 0;
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-
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- /* Recreate pddac table for this channel using pddac steps */
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- chan_pcal_info->pddac[c][0] += chan_pcal_info->pddac_i[c];
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- chan_pcal_info->pddac[c][1] += chan_pcal_info->pddac[c][0];
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- chan_pcal_info->pddac[c][2] += chan_pcal_info->pddac[c][1];
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- chan_pcal_info->pddac[c][3] += chan_pcal_info->pddac[c][2];
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- if (chan_pcal_info->pddac[c][3] == chan_pcal_info->pddac[c][2])
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- chan_pcal_info->pddac[c][3] = 0;
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+ /* prepare the raw values */
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+ for (i = 0; i < ee->ee_n_piers[mode]; i++) {
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+ pcinfo = &chinfo[i].rf2413_info;
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+ for (j = 0; j < ee->ee_pd_gains[mode]; j++) {
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+ unsigned int idx = xgains[j];
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+ struct ath5k_pdgain_info *pd = &pcinfo->pdgains[idx];
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+
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+ /* one more point for the highest power (lowest gain) */
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+ if (j == ee->ee_pd_gains[mode] - 1) {
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+ pd->n_vpd = AR5K_EEPROM_N_PD_POINTS;
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+ } else {
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+ pd->n_vpd = AR5K_EEPROM_N_PD_POINTS - 1;
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+ }
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+
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|
+ pd->vpd[0] = pcinfo->pddac_i[j];
|
|
+ pd->pwr_t4[0] = 4 * pcinfo->pwr_i[j];
|
|
+ for (k = 1; k < pd->n_vpd; k++) {
|
|
+ pd->pwr_t4[k] = pd->pwr_t4[k - 1] + 2 * pcinfo->pwr[j][k - 1];
|
|
+ pd->vpd[k] = pd->vpd[k - 1] + pcinfo->pddac[j][k - 1];
|
|
+ }
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
+static int
|
|
+ath5k_eeprom_read_pcal_info_2413(struct ath5k_hw *ah, int mode)
|
|
+{
|
|
+ struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
|
|
+ struct ath5k_chan_pcal_info *chinfo;
|
|
+ unsigned int xgains[AR5K_EEPROM_N_PD_GAINS];
|
|
+ u32 offset;
|
|
+ u8 pd_gains = 0;
|
|
+ int i, ret;
|
|
+
|
|
+ memset(xgains, 0, sizeof(xgains));
|
|
+ for (i = 0; i < AR5K_EEPROM_N_PD_GAINS; i++) {
|
|
+ int idx = AR5K_EEPROM_N_PD_GAINS - i - 1;
|
|
+
|
|
+ if ((ee->ee_x_gain[mode] >> idx) & 0x1)
|
|
+ xgains[pd_gains++] = idx;
|
|
+ }
|
|
+ ee->ee_pd_gains[mode] = pd_gains;
|
|
+
|
|
+ offset = ath5k_cal_data_offset_2413(ee, mode);
|
|
+ switch (mode) {
|
|
+ case AR5K_EEPROM_MODE_11A:
|
|
+ if (!AR5K_EEPROM_HDR_11A(ee->ee_header))
|
|
+ return 0;
|
|
+
|
|
+ ath5k_eeprom_init_11a_pcal_freq(ah, offset);
|
|
+ offset += AR5K_EEPROM_N_5GHZ_CHAN / 2;
|
|
+ chinfo = ee->ee_pwr_cal_a;
|
|
+ break;
|
|
+ case AR5K_EEPROM_MODE_11B:
|
|
+ if (!AR5K_EEPROM_HDR_11B(ee->ee_header))
|
|
+ return 0;
|
|
+
|
|
+ ath5k_eeprom_init_11bg_2413(ah, mode, offset);
|
|
+ offset += AR5K_EEPROM_N_2GHZ_CHAN_2413 / 2;
|
|
+ chinfo = ee->ee_pwr_cal_b;
|
|
+ break;
|
|
+ case AR5K_EEPROM_MODE_11G:
|
|
+ if (!AR5K_EEPROM_HDR_11G(ee->ee_header))
|
|
+ return 0;
|
|
+
|
|
+ ath5k_eeprom_init_11bg_2413(ah, mode, offset);
|
|
+ offset += AR5K_EEPROM_N_2GHZ_CHAN_2413 / 2;
|
|
+ chinfo = ee->ee_pwr_cal_g;
|
|
+ break;
|
|
+ default:
|
|
+ return -EINVAL;
|
|
+ }
|
|
+
|
|
+
|
|
+ ret = ath5k_eeprom_parse_pcal_info_2413(ah, mode, offset, chinfo);
|
|
+ if (ret)
|
|
+ return ret;
|
|
+
|
|
+ ret = ath5k_eeprom_convert_pcal_info_2413(ah, mode, chinfo, xgains);
|
|
+ if (ret)
|
|
+ return ret;
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
/*
|
|
* Read per rate target power (this is the maximum tx power
|
|
* supported by the card). This info is used when setting
|
|
@@ -1264,6 +1271,7 @@ ath5k_eeprom_read_pcal_info(struct ath5k
|
|
else
|
|
read_pcal = ath5k_eeprom_read_pcal_info_5111;
|
|
|
|
+
|
|
for (mode = AR5K_EEPROM_MODE_11A; mode <= AR5K_EEPROM_MODE_11G; mode++) {
|
|
err = read_pcal(ah, mode);
|
|
if (err)
|
|
--- a/drivers/net/wireless/ath5k/eeprom.h
|
|
+++ b/drivers/net/wireless/ath5k/eeprom.h
|
|
@@ -266,15 +266,27 @@ struct ath5k_chan_pcal_info_rf5112 {
|
|
u8 pcdac_x3[AR5K_EEPROM_N_XPD3_POINTS];
|
|
};
|
|
|
|
+
|
|
+struct ath5k_pdgain_info {
|
|
+ u16 n_vpd;
|
|
+ u16 vpd[AR5K_EEPROM_N_PD_POINTS];
|
|
+ s16 pwr_t4[AR5K_EEPROM_N_PD_POINTS];
|
|
+};
|
|
+
|
|
struct ath5k_chan_pcal_info_rf2413 {
|
|
+ /* --- EEPROM VALUES --- */
|
|
/* Starting pwr/pddac values */
|
|
- s8 pwr_i[AR5K_EEPROM_N_PD_GAINS];
|
|
- u8 pddac_i[AR5K_EEPROM_N_PD_GAINS];
|
|
+ s8 pwr_i[AR5K_EEPROM_N_PD_GAINS];
|
|
+ u8 pddac_i[AR5K_EEPROM_N_PD_GAINS];
|
|
/* (pwr,pddac) points */
|
|
- s8 pwr[AR5K_EEPROM_N_PD_GAINS]
|
|
- [AR5K_EEPROM_N_PD_POINTS];
|
|
- u8 pddac[AR5K_EEPROM_N_PD_GAINS]
|
|
- [AR5K_EEPROM_N_PD_POINTS];
|
|
+ s8 pwr[AR5K_EEPROM_N_PD_GAINS]
|
|
+ [AR5K_EEPROM_N_PD_POINTS];
|
|
+ u8 pddac[AR5K_EEPROM_N_PD_GAINS]
|
|
+ [AR5K_EEPROM_N_PD_POINTS];
|
|
+
|
|
+ /* --- RAW VALUES --- */
|
|
+ struct ath5k_pdgain_info pdgains
|
|
+ [AR5K_EEPROM_N_PD_GAINS];
|
|
};
|
|
|
|
struct ath5k_chan_pcal_info {
|