mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-09-19 23:23:16 +03:00
48e652dc63
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@19402 3c298f89-4303-0410-b956-a3cf2f4a3e73
313 lines
6.2 KiB
C
313 lines
6.2 KiB
C
/*
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* Realtek RTL8366 SMI interface driver
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*
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* Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/gpio.h>
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#include <linux/spinlock.h>
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#include "rtl8366_smi.h"
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#define RTL8366_SMI_ACK_RETRY_COUNT 5
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#define RTL8366_SMI_CLK_DELAY 10 /* nsec */
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static inline void rtl8366_smi_clk_delay(struct rtl8366_smi *smi)
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{
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ndelay(RTL8366_SMI_CLK_DELAY);
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}
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static void rtl8366_smi_start(struct rtl8366_smi *smi)
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{
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unsigned int sda = smi->gpio_sda;
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unsigned int sck = smi->gpio_sck;
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/*
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* Set GPIO pins to output mode, with initial state:
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* SCK = 0, SDA = 1
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*/
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gpio_direction_output(sck, 0);
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gpio_direction_output(sda, 1);
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rtl8366_smi_clk_delay(smi);
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/* CLK 1: 0 -> 1, 1 -> 0 */
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gpio_set_value(sck, 1);
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rtl8366_smi_clk_delay(smi);
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gpio_set_value(sck, 0);
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rtl8366_smi_clk_delay(smi);
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/* CLK 2: */
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gpio_set_value(sck, 1);
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rtl8366_smi_clk_delay(smi);
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gpio_set_value(sda, 0);
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rtl8366_smi_clk_delay(smi);
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gpio_set_value(sck, 0);
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rtl8366_smi_clk_delay(smi);
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gpio_set_value(sda, 1);
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}
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static void rtl8366_smi_stop(struct rtl8366_smi *smi)
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{
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unsigned int sda = smi->gpio_sda;
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unsigned int sck = smi->gpio_sck;
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rtl8366_smi_clk_delay(smi);
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gpio_set_value(sda, 0);
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gpio_set_value(sck, 1);
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rtl8366_smi_clk_delay(smi);
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gpio_set_value(sda, 1);
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rtl8366_smi_clk_delay(smi);
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gpio_set_value(sck, 1);
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rtl8366_smi_clk_delay(smi);
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gpio_set_value(sck, 0);
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rtl8366_smi_clk_delay(smi);
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gpio_set_value(sck, 1);
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/* add a click */
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rtl8366_smi_clk_delay(smi);
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gpio_set_value(sck, 0);
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rtl8366_smi_clk_delay(smi);
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gpio_set_value(sck, 1);
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/* set GPIO pins to input mode */
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gpio_direction_input(sda);
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gpio_direction_input(sck);
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}
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static void rtl8366_smi_write_bits(struct rtl8366_smi *smi, u32 data, u32 len)
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{
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unsigned int sda = smi->gpio_sda;
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unsigned int sck = smi->gpio_sck;
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for (; len > 0; len--) {
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rtl8366_smi_clk_delay(smi);
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/* prepare data */
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gpio_set_value(sda, !!(data & ( 1 << (len - 1))));
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rtl8366_smi_clk_delay(smi);
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/* clocking */
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gpio_set_value(sck, 1);
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rtl8366_smi_clk_delay(smi);
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gpio_set_value(sck, 0);
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}
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}
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static void rtl8366_smi_read_bits(struct rtl8366_smi *smi, u32 len, u32 *data)
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{
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unsigned int sda = smi->gpio_sda;
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unsigned int sck = smi->gpio_sck;
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gpio_direction_input(sda);
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for (*data = 0; len > 0; len--) {
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u32 u;
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rtl8366_smi_clk_delay(smi);
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/* clocking */
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gpio_set_value(sck, 1);
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rtl8366_smi_clk_delay(smi);
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u = !!gpio_get_value(sda);
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gpio_set_value(sck, 0);
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*data |= (u << (len - 1));
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}
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gpio_direction_output(sda, 0);
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}
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static int rtl8366_smi_wait_for_ack(struct rtl8366_smi *smi)
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{
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int retry_cnt;
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retry_cnt = 0;
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do {
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u32 ack;
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rtl8366_smi_read_bits(smi, 1, &ack);
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if (ack == 0)
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break;
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if (++retry_cnt > RTL8366_SMI_ACK_RETRY_COUNT)
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return -EIO;
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} while (1);
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return 0;
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}
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static int rtl8366_smi_write_byte(struct rtl8366_smi *smi, u8 data)
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{
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rtl8366_smi_write_bits(smi, data, 8);
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return rtl8366_smi_wait_for_ack(smi);
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}
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static int rtl8366_smi_read_byte0(struct rtl8366_smi *smi, u8 *data)
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{
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u32 t;
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/* read data */
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rtl8366_smi_read_bits(smi, 8, &t);
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*data = (t & 0xff);
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/* send an ACK */
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rtl8366_smi_write_bits(smi, 0x00, 1);
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return 0;
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}
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static int rtl8366_smi_read_byte1(struct rtl8366_smi *smi, u8 *data)
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{
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u32 t;
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/* read data */
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rtl8366_smi_read_bits(smi, 8, &t);
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*data = (t & 0xff);
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/* send an ACK */
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rtl8366_smi_write_bits(smi, 0x01, 1);
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return 0;
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}
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int rtl8366_smi_read_reg(struct rtl8366_smi *smi, u32 addr, u32 *data)
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{
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unsigned long flags;
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u8 lo = 0;
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u8 hi = 0;
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int ret;
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spin_lock_irqsave(&smi->lock, flags);
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rtl8366_smi_start(smi);
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/* send READ command */
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ret = rtl8366_smi_write_byte(smi, 0x0a << 4 | 0x04 << 1 | 0x01);
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if (ret)
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goto out;
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/* set ADDR[7:0] */
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ret = rtl8366_smi_write_byte(smi, addr & 0xff);
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if (ret)
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goto out;
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/* set ADDR[15:8] */
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ret = rtl8366_smi_write_byte(smi, addr >> 8);
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if (ret)
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goto out;
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/* read DATA[7:0] */
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rtl8366_smi_read_byte0(smi, &lo);
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/* read DATA[15:8] */
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rtl8366_smi_read_byte1(smi, &hi);
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*data = ((u32) lo) | (((u32) hi) << 8);
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ret = 0;
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out:
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rtl8366_smi_stop(smi);
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spin_unlock_irqrestore(&smi->lock, flags);
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return ret;
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}
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EXPORT_SYMBOL_GPL(rtl8366_smi_read_reg);
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int rtl8366_smi_write_reg(struct rtl8366_smi *smi, u32 addr, u32 data)
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{
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unsigned long flags;
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int ret;
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spin_lock_irqsave(&smi->lock, flags);
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rtl8366_smi_start(smi);
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/* send WRITE command */
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ret = rtl8366_smi_write_byte(smi, 0x0a << 4 | 0x04 << 1 | 0x00);
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if (ret)
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goto out;
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/* set ADDR[7:0] */
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ret = rtl8366_smi_write_byte(smi, addr & 0xff);
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if (ret)
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goto out;
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/* set ADDR[15:8] */
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ret = rtl8366_smi_write_byte(smi, addr >> 8);
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if (ret)
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goto out;
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/* write DATA[7:0] */
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ret = rtl8366_smi_write_byte(smi, data & 0xff);
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if (ret)
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goto out;
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/* write DATA[15:8] */
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ret = rtl8366_smi_write_byte(smi, data >> 8);
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if (ret)
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goto out;
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ret = 0;
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out:
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rtl8366_smi_stop(smi);
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spin_unlock_irqrestore(&smi->lock, flags);
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return ret;
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}
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EXPORT_SYMBOL_GPL(rtl8366_smi_write_reg);
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int rtl8366_smi_init(struct rtl8366_smi *smi)
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{
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int err;
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if (!smi->parent)
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return -EINVAL;
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err = gpio_request(smi->gpio_sda, dev_name(smi->parent));
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if (err) {
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dev_err(smi->parent, "gpio_request failed for %u, err=%d\n",
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smi->gpio_sda, err);
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goto err_out;
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}
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err = gpio_request(smi->gpio_sck, dev_name(smi->parent));
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if (err) {
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dev_err(smi->parent, "gpio_request failed for %u, err=%d\n",
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smi->gpio_sck, err);
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goto err_free_sda;
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}
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spin_lock_init(&smi->lock);
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dev_info(smi->parent, "using GPIO pins %u (SDA) and %u (SCK)\n",
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smi->gpio_sda, smi->gpio_sck);
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return 0;
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err_free_sda:
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gpio_free(smi->gpio_sda);
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err_out:
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return err;
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}
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EXPORT_SYMBOL_GPL(rtl8366_smi_init);
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void rtl8366_smi_cleanup(struct rtl8366_smi *smi)
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{
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gpio_free(smi->gpio_sck);
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gpio_free(smi->gpio_sda);
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}
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EXPORT_SYMBOL_GPL(rtl8366_smi_cleanup);
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MODULE_DESCRIPTION("Realtek RTL8366 SMI interface driver");
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MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
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MODULE_LICENSE("GPL v2");
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