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3e65a7b3dd
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@30502 3c298f89-4303-0410-b956-a3cf2f4a3e73
34 lines
1.2 KiB
Diff
34 lines
1.2 KiB
Diff
commit 3e9957b4866f3767f19bf0e543b322ad7906c564
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Author: Florian Fainelli <florian@openwrt.org>
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Date: Fri May 13 17:41:21 2011 +0200
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MIPS: AR7: Fix GPIO register size for Titan variant.
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The 'size' variable contains the correct register size for both AR7
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and Titan, but we never used it to ioremap the correct register size.
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This problem only shows up on Titan.
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[ralf@linux-mips.org: Fixed the fix. The original patch as in patchwork
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recognizes the problem correctly then fails to fix it ...]
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Reported-by: Alexander Clouter <alex@digriz.org.uk>
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Signed-off-by: Florian Fainelli <florian@openwrt.org>
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Patchwork: https://patchwork.linux-mips.org/patch/2380/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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diff --git a/arch/mips/ar7/gpio.c b/arch/mips/ar7/gpio.c
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index 425dfa5..bb571bc 100644
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--- a/arch/mips/ar7/gpio.c
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+++ b/arch/mips/ar7/gpio.c
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@@ -325,9 +325,7 @@ int __init ar7_gpio_init(void)
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size = 0x1f;
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}
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- gpch->regs = ioremap_nocache(AR7_REGS_GPIO,
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- AR7_REGS_GPIO + 0x10);
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-
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+ gpch->regs = ioremap_nocache(AR7_REGS_GPIO, size);
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if (!gpch->regs) {
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printk(KERN_ERR "%s: failed to ioremap regs\n",
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gpch->chip.label);
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