mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-18 14:37:31 +02:00
5a642c03dd
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@22924 3c298f89-4303-0410-b956-a3cf2f4a3e73
422 lines
9.4 KiB
Diff
422 lines
9.4 KiB
Diff
--- /dev/null
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+++ b/drivers/gpio/gw_i2c_pld.c
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@@ -0,0 +1,371 @@
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+/*
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+ * Gateworks I2C PLD GPIO expander
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+ *
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+ * Copyright (C) 2009 Gateworks Corporation
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/slab.h>
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+#include <linux/hardirq.h>
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+#include <linux/i2c.h>
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+#include <linux/i2c/gw_i2c_pld.h>
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+#include <asm/gpio.h>
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+
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+static const struct i2c_device_id gw_i2c_pld_id[] = {
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+ { "gw_i2c_pld", 8 },
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+ { }
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+};
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+MODULE_DEVICE_TABLE(i2c, gw_i2c_pld_id);
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+
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+/*
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+ * The Gateworks I2C PLD chip only expose one read and one
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+ * write register. Writing a "one" bit (to match the reset state) lets
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+ * that pin be used as an input. It is an open-drain model.
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+ */
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+
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+struct gw_i2c_pld {
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+ struct gpio_chip chip;
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+ struct i2c_client *client;
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+ unsigned out; /* software latch */
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+};
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+
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+/*-------------------------------------------------------------------------*/
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+
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+/*
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+ * The Gateworks I2C PLD chip does not properly send the acknowledge bit
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+ * thus we cannot use standard i2c_smbus functions. We have recreated
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+ * our own here, but we still use the mutex_lock to lock the i2c_bus
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+ * as the device still exists on the I2C bus.
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+*/
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+
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+#define PLD_SCL_GPIO 6
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+#define PLD_SDA_GPIO 7
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+
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+#define SCL_LO() gpio_line_set(PLD_SCL_GPIO, IXP4XX_GPIO_LOW)
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+#define SCL_HI() gpio_line_set(PLD_SCL_GPIO, IXP4XX_GPIO_HIGH)
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+#define SCL_EN() gpio_line_config(PLD_SCL_GPIO, IXP4XX_GPIO_OUT)
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+#define SDA_LO() gpio_line_set(PLD_SDA_GPIO, IXP4XX_GPIO_LOW)
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+#define SDA_HI() gpio_line_set(PLD_SDA_GPIO, IXP4XX_GPIO_HIGH)
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+#define SDA_EN() gpio_line_config(PLD_SDA_GPIO, IXP4XX_GPIO_OUT)
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+#define SDA_DIS() gpio_line_config(PLD_SDA_GPIO, IXP4XX_GPIO_IN)
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+#define SDA_IN(x) gpio_line_get(PLD_SDA_GPIO, &x);
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+
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+static int i2c_pld_write_byte(int address, int byte)
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+{
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+ int i;
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+
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+ address = (address << 1) & ~0x1;
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+
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+ SDA_HI();
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+ SDA_EN();
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+ SCL_EN();
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+ SCL_HI();
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+ SDA_LO();
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+ SCL_LO();
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+
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+ for (i = 7; i >= 0; i--)
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+ {
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+ if (address & (1 << i))
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+ SDA_HI();
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+ else
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+ SDA_LO();
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+
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+ SCL_HI();
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+ SCL_LO();
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+ }
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+
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+ SDA_DIS();
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+ SCL_HI();
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+ SDA_IN(i);
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+ SCL_LO();
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+ SDA_EN();
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+
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+ for (i = 7; i >= 0; i--)
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+ {
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+ if (byte & (1 << i))
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+ SDA_HI();
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+ else
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+ SDA_LO();
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+ SCL_HI();
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+ SCL_LO();
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+ }
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+
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+ SDA_DIS();
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+ SCL_HI();
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+ SDA_IN(i);
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+ SCL_LO();
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+
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+ SDA_HI();
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+ SDA_EN();
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+
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+ SDA_LO();
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+ SCL_HI();
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+ SDA_HI();
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+ SCL_LO();
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+ SCL_HI();
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+
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+ return 0;
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+}
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+
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+static unsigned int i2c_pld_read_byte(int address)
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+{
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+ int i = 0, byte = 0;
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+ int bit;
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+
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+ address = (address << 1) | 0x1;
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+
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+ SDA_HI();
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+ SDA_EN();
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+ SCL_EN();
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+ SCL_HI();
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+ SDA_LO();
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+ SCL_LO();
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+
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+ for (i = 7; i >= 0; i--)
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+ {
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+ if (address & (1 << i))
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+ SDA_HI();
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+ else
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+ SDA_LO();
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+
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+ SCL_HI();
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+ SCL_LO();
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+ }
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+
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+ SDA_DIS();
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+ SCL_HI();
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+ SDA_IN(i);
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+ SCL_LO();
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+ SDA_EN();
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+
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+ SDA_DIS();
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+ for (i = 7; i >= 0; i--)
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+ {
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+ SCL_HI();
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+ SDA_IN(bit);
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+ byte |= bit << i;
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+ SCL_LO();
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+ }
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+
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+ SDA_LO();
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+ SCL_HI();
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+ SDA_HI();
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+ SCL_LO();
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+ SCL_HI();
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+
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+ return byte;
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+}
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+
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+
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+static int gw_i2c_pld_input8(struct gpio_chip *chip, unsigned offset)
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+{
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+ int ret;
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+ struct gw_i2c_pld *gpio = container_of(chip, struct gw_i2c_pld, chip);
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+ struct i2c_adapter *adap = gpio->client->adapter;
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+
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+ if (in_atomic() || irqs_disabled()) {
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+ ret = mutex_trylock(&adap->bus_lock);
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+ if (!ret)
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+ /* I2C activity is ongoing. */
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+ return -EAGAIN;
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+ } else {
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+ mutex_lock_nested(&adap->bus_lock, adap->level);
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+ }
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+
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+ gpio->out |= (1 << offset);
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+
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+ ret = i2c_pld_write_byte(gpio->client->addr, gpio->out);
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+
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+ mutex_unlock(&adap->bus_lock);
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+
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+ return ret;
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+}
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+
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+static int gw_i2c_pld_get8(struct gpio_chip *chip, unsigned offset)
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+{
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+ int ret;
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+ s32 value;
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+ struct gw_i2c_pld *gpio = container_of(chip, struct gw_i2c_pld, chip);
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+ struct i2c_adapter *adap = gpio->client->adapter;
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+
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+ if (in_atomic() || irqs_disabled()) {
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+ ret = mutex_trylock(&adap->bus_lock);
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+ if (!ret)
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+ /* I2C activity is ongoing. */
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+ return -EAGAIN;
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+ } else {
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+ mutex_lock_nested(&adap->bus_lock, adap->level);
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+ }
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+
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+ value = i2c_pld_read_byte(gpio->client->addr);
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+
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+ mutex_unlock(&adap->bus_lock);
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+
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+ return (value < 0) ? 0 : (value & (1 << offset));
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+}
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+
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+static int gw_i2c_pld_output8(struct gpio_chip *chip, unsigned offset, int value)
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+{
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+ int ret;
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+
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+ struct gw_i2c_pld *gpio = container_of(chip, struct gw_i2c_pld, chip);
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+ struct i2c_adapter *adap = gpio->client->adapter;
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+
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+ unsigned bit = 1 << offset;
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+
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+ if (in_atomic() || irqs_disabled()) {
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+ ret = mutex_trylock(&adap->bus_lock);
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+ if (!ret)
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+ /* I2C activity is ongoing. */
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+ return -EAGAIN;
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+ } else {
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+ mutex_lock_nested(&adap->bus_lock, adap->level);
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+ }
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+
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+
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+ if (value)
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+ gpio->out |= bit;
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+ else
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+ gpio->out &= ~bit;
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+
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+ ret = i2c_pld_write_byte(gpio->client->addr, gpio->out);
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+
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+ mutex_unlock(&adap->bus_lock);
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+
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+ return ret;
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+}
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+
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+static void gw_i2c_pld_set8(struct gpio_chip *chip, unsigned offset, int value)
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+{
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+ gw_i2c_pld_output8(chip, offset, value);
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+}
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+
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+/*-------------------------------------------------------------------------*/
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+
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+static int gw_i2c_pld_probe(struct i2c_client *client,
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+ const struct i2c_device_id *id)
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+{
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+ struct gw_i2c_pld_platform_data *pdata;
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+ struct gw_i2c_pld *gpio;
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+ int status;
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+
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+ pdata = client->dev.platform_data;
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+ if (!pdata)
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+ return -ENODEV;
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+
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+ /* Allocate, initialize, and register this gpio_chip. */
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+ gpio = kzalloc(sizeof *gpio, GFP_KERNEL);
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+ if (!gpio)
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+ return -ENOMEM;
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+
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+ gpio->chip.base = pdata->gpio_base;
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+ gpio->chip.can_sleep = 1;
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+ gpio->chip.dev = &client->dev;
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+ gpio->chip.owner = THIS_MODULE;
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+
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+ gpio->chip.ngpio = pdata->nr_gpio;
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+ gpio->chip.direction_input = gw_i2c_pld_input8;
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+ gpio->chip.get = gw_i2c_pld_get8;
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+ gpio->chip.direction_output = gw_i2c_pld_output8;
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+ gpio->chip.set = gw_i2c_pld_set8;
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+
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+ gpio->chip.label = client->name;
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+
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+ gpio->client = client;
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+ i2c_set_clientdata(client, gpio);
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+
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+ gpio->out = 0xFF;
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+
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+ status = gpiochip_add(&gpio->chip);
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+ if (status < 0)
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+ goto fail;
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+
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+ dev_info(&client->dev, "gpios %d..%d on a %s%s\n",
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+ gpio->chip.base,
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+ gpio->chip.base + gpio->chip.ngpio - 1,
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+ client->name,
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+ client->irq ? " (irq ignored)" : "");
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+
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+ /* Let platform code set up the GPIOs and their users.
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+ * Now is the first time anyone could use them.
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+ */
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+ if (pdata->setup) {
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+ status = pdata->setup(client,
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+ gpio->chip.base, gpio->chip.ngpio,
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+ pdata->context);
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+ if (status < 0)
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+ dev_warn(&client->dev, "setup --> %d\n", status);
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+ }
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+
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+ return 0;
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+
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+fail:
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+ dev_dbg(&client->dev, "probe error %d for '%s'\n",
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+ status, client->name);
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+ kfree(gpio);
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+ return status;
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+}
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+
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+static int gw_i2c_pld_remove(struct i2c_client *client)
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+{
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+ struct gw_i2c_pld_platform_data *pdata = client->dev.platform_data;
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+ struct gw_i2c_pld *gpio = i2c_get_clientdata(client);
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+ int status = 0;
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+
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+ if (pdata->teardown) {
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+ status = pdata->teardown(client,
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+ gpio->chip.base, gpio->chip.ngpio,
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+ pdata->context);
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+ if (status < 0) {
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+ dev_err(&client->dev, "%s --> %d\n",
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+ "teardown", status);
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+ return status;
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+ }
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+ }
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+
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+ status = gpiochip_remove(&gpio->chip);
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+ if (status == 0)
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+ kfree(gpio);
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+ else
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+ dev_err(&client->dev, "%s --> %d\n", "remove", status);
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+ return status;
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+}
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+
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+static struct i2c_driver gw_i2c_pld_driver = {
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+ .driver = {
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+ .name = "gw_i2c_pld",
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+ .owner = THIS_MODULE,
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+ },
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+ .probe = gw_i2c_pld_probe,
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+ .remove = gw_i2c_pld_remove,
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+ .id_table = gw_i2c_pld_id,
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+};
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+
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+static int __init gw_i2c_pld_init(void)
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+{
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+ return i2c_add_driver(&gw_i2c_pld_driver);
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+}
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+module_init(gw_i2c_pld_init);
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+
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+static void __exit gw_i2c_pld_exit(void)
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+{
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+ i2c_del_driver(&gw_i2c_pld_driver);
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+}
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+module_exit(gw_i2c_pld_exit);
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+
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+MODULE_LICENSE("GPL");
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+MODULE_AUTHOR("Chris Lang");
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--- a/drivers/gpio/Kconfig
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+++ b/drivers/gpio/Kconfig
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@@ -298,6 +298,14 @@ config GPIO_RDC321X
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Support for the RDC R321x SoC GPIOs over southbridge
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PCI configuration space.
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+config GPIO_GW_I2C_PLD
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+ tristate "Gateworks I2C PLD GPIO Expander"
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+ depends on I2C
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+ help
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+ Say yes here to provide access to the Gateworks I2C PLD GPIO
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+ Expander. This is used at least on the GW2358-4.
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+
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+
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comment "SPI GPIO expanders:"
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config GPIO_MAX7301
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--- a/drivers/gpio/Makefile
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+++ b/drivers/gpio/Makefile
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@@ -37,3 +37,4 @@ obj-$(CONFIG_GPIO_SCH) += sch_gpio.o
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obj-$(CONFIG_GPIO_RDC321X) += rdc321x-gpio.o
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obj-$(CONFIG_GPIO_JANZ_TTL) += janz-ttl.o
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obj-$(CONFIG_GPIO_SX150X) += sx150x.o
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+obj-$(CONFIG_GPIO_GW_I2C_PLD) += gw_i2c_pld.o
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--- /dev/null
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+++ b/include/linux/i2c/gw_i2c_pld.h
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@@ -0,0 +1,20 @@
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+#ifndef __LINUX_GW_I2C_PLD_H
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+#define __LINUX_GW_I2C_PLD_H
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+
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+/**
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+ * The Gateworks I2C PLD Implements an additional 8 bits of GPIO through the PLD
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+ */
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+
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+struct gw_i2c_pld_platform_data {
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+ unsigned gpio_base;
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+ unsigned nr_gpio;
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+ int (*setup)(struct i2c_client *client,
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+ int gpio, unsigned ngpio,
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+ void *context);
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+ int (*teardown)(struct i2c_client *client,
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+ int gpio, unsigned ngpio,
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+ void *context);
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+ void *context;
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+};
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+
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+#endif /* __LINUX_GW_I2C_PLD_H */
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