mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-07-19 17:36:37 +03:00
8e06d437aa
Based on a patch by Wojciech Dubowik <Wojciech.Dubowik@neratec.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31529 3c298f89-4303-0410-b956-a3cf2f4a3e73
41 lines
956 B
Diff
41 lines
956 B
Diff
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
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+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
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@@ -301,6 +301,9 @@
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0x0 0x100000>;
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};
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};
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+ chosen {
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+ linux,stdout-path = "/soc8548@e0000000/serial@4600";
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+ };
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};
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/include/ "fsl/mpc8548si-post.dtsi"
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--- a/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi
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+++ b/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi
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@@ -116,7 +116,24 @@
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/include/ "pq3-i2c-0.dtsi"
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/include/ "pq3-i2c-1.dtsi"
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-/include/ "pq3-duart-0.dtsi"
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+
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+ serial0: serial@4600 {
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+ cell-index = <1>;
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+ device_type = "serial";
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+ compatible = "fsl,ns16550", "ns16550";
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+ reg = <0x4600 0x100>;
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+ clock-frequency = <0>;
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+ interrupts = <42 2 0 0>;
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+ };
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+
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+ serial1: serial@4500 {
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+ cell-index = <0>;
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+ device_type = "serial";
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+ compatible = "fsl,ns16550", "ns16550";
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+ reg = <0x4500 0x100>;
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+ clock-frequency = <0>;
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+ interrupts = <42 2 0 0>;
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+ };
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L2: l2-cache-controller@20000 {
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compatible = "fsl,mpc8548-l2-cache-controller";
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