mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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532249b507
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@9302 3c298f89-4303-0410-b956-a3cf2f4a3e73
272 lines
6.1 KiB
C
272 lines
6.1 KiB
C
/*
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* Sonics Silicon Backplane
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* PCMCIA-Hostbus related functions
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*
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* Copyright 2006 Johannes Berg <johannes@sipsolutions.net>
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* Copyright 2007 Michael Buesch <mb@bu3sch.de>
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*
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* Licensed under the GNU/GPL. See COPYING for details.
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*/
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#include <linux/ssb/ssb.h>
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#include <linux/delay.h>
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#include <pcmcia/cs_types.h>
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#include <pcmcia/cs.h>
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#include <pcmcia/cistpl.h>
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#include <pcmcia/ciscode.h>
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#include <pcmcia/ds.h>
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#include <pcmcia/cisreg.h>
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#include "ssb_private.h"
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/* Define the following to 1 to enable a printk on each coreswitch. */
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#define SSB_VERBOSE_PCMCIACORESWITCH_DEBUG 0
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int ssb_pcmcia_switch_coreidx(struct ssb_bus *bus,
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u8 coreidx)
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{
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struct pcmcia_device *pdev = bus->host_pcmcia;
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int err;
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int attempts = 0;
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u32 cur_core;
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conf_reg_t reg;
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u32 addr;
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u32 read_addr;
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addr = (coreidx * SSB_CORE_SIZE) + SSB_ENUM_BASE;
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while (1) {
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reg.Action = CS_WRITE;
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reg.Offset = 0x2E;
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reg.Value = (addr & 0x0000F000) >> 12;
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err = pcmcia_access_configuration_register(pdev, ®);
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if (err != CS_SUCCESS)
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goto error;
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reg.Offset = 0x30;
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reg.Value = (addr & 0x00FF0000) >> 16;
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err = pcmcia_access_configuration_register(pdev, ®);
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if (err != CS_SUCCESS)
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goto error;
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reg.Offset = 0x32;
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reg.Value = (addr & 0xFF000000) >> 24;
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err = pcmcia_access_configuration_register(pdev, ®);
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if (err != CS_SUCCESS)
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goto error;
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read_addr = 0;
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reg.Action = CS_READ;
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reg.Offset = 0x2E;
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err = pcmcia_access_configuration_register(pdev, ®);
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if (err != CS_SUCCESS)
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goto error;
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read_addr |= (reg.Value & 0xF) << 12;
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reg.Offset = 0x30;
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err = pcmcia_access_configuration_register(pdev, ®);
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if (err != CS_SUCCESS)
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goto error;
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read_addr |= reg.Value << 16;
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reg.Offset = 0x32;
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err = pcmcia_access_configuration_register(pdev, ®);
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if (err != CS_SUCCESS)
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goto error;
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read_addr |= reg.Value << 24;
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cur_core = (read_addr - SSB_ENUM_BASE) / SSB_CORE_SIZE;
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if (cur_core == coreidx)
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break;
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if (attempts++ > SSB_BAR0_MAX_RETRIES)
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goto error;
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udelay(10);
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}
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return 0;
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error:
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ssb_printk(KERN_ERR PFX "Failed to switch to core %u\n", coreidx);
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return -ENODEV;
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}
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int ssb_pcmcia_switch_core(struct ssb_bus *bus,
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struct ssb_device *dev)
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{
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int err;
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unsigned long flags;
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#if SSB_VERBOSE_PCMCIACORESWITCH_DEBUG
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ssb_printk(KERN_INFO PFX
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"Switching to %s core, index %d\n",
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ssb_core_name(dev->id.coreid),
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dev->core_index);
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#endif
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spin_lock_irqsave(&bus->bar_lock, flags);
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err = ssb_pcmcia_switch_coreidx(bus, dev->core_index);
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if (!err)
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bus->mapped_device = dev;
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spin_unlock_irqrestore(&bus->bar_lock, flags);
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return err;
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}
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int ssb_pcmcia_switch_segment(struct ssb_bus *bus, u8 seg)
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{
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int attempts = 0;
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unsigned long flags;
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conf_reg_t reg;
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int res, err = 0;
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SSB_WARN_ON((seg != 0) && (seg != 1));
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reg.Offset = 0x34;
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reg.Function = 0;
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spin_lock_irqsave(&bus->bar_lock, flags);
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while (1) {
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reg.Action = CS_WRITE;
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reg.Value = seg;
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res = pcmcia_access_configuration_register(bus->host_pcmcia, ®);
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if (unlikely(res != CS_SUCCESS))
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goto error;
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reg.Value = 0xFF;
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reg.Action = CS_READ;
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res = pcmcia_access_configuration_register(bus->host_pcmcia, ®);
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if (unlikely(res != CS_SUCCESS))
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goto error;
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if (reg.Value == seg)
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break;
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if (unlikely(attempts++ > SSB_BAR0_MAX_RETRIES))
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goto error;
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udelay(10);
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}
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bus->mapped_pcmcia_seg = seg;
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out_unlock:
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spin_unlock_irqrestore(&bus->bar_lock, flags);
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return err;
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error:
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ssb_printk(KERN_ERR PFX "Failed to switch pcmcia segment\n");
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err = -ENODEV;
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goto out_unlock;
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}
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/* These are the main device register access functions.
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* do_select_core is inline to have the likely hotpath inline.
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* All unlikely codepaths are out-of-line. */
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static inline int do_select_core(struct ssb_bus *bus,
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struct ssb_device *dev,
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u16 *offset)
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{
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int err;
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u8 need_seg = (*offset >= 0x800) ? 1 : 0;
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if (unlikely(dev != bus->mapped_device)) {
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err = ssb_pcmcia_switch_core(bus, dev);
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if (unlikely(err))
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return err;
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}
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if (unlikely(need_seg != bus->mapped_pcmcia_seg)) {
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err = ssb_pcmcia_switch_segment(bus, need_seg);
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if (unlikely(err))
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return err;
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}
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if (need_seg == 1)
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*offset -= 0x800;
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return 0;
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}
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static u16 ssb_pcmcia_read16(struct ssb_device *dev, u16 offset)
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{
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struct ssb_bus *bus = dev->bus;
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u16 x;
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if (unlikely(do_select_core(bus, dev, &offset)))
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return 0xFFFF;
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x = readw(bus->mmio + offset);
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return x;
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}
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static u32 ssb_pcmcia_read32(struct ssb_device *dev, u16 offset)
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{
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struct ssb_bus *bus = dev->bus;
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u32 x;
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if (unlikely(do_select_core(bus, dev, &offset)))
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return 0xFFFFFFFF;
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x = readl(bus->mmio + offset);
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return x;
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}
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static void ssb_pcmcia_write16(struct ssb_device *dev, u16 offset, u16 value)
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{
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struct ssb_bus *bus = dev->bus;
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if (unlikely(do_select_core(bus, dev, &offset)))
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return;
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writew(value, bus->mmio + offset);
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}
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static void ssb_pcmcia_write32(struct ssb_device *dev, u16 offset, u32 value)
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{
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struct ssb_bus *bus = dev->bus;
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if (unlikely(do_select_core(bus, dev, &offset)))
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return;
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readw(bus->mmio + offset);
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writew(value >> 16, bus->mmio + offset + 2);
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readw(bus->mmio + offset);
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writew(value, bus->mmio + offset);
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}
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/* Not "static", as it's used in main.c */
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const struct ssb_bus_ops ssb_pcmcia_ops = {
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.read16 = ssb_pcmcia_read16,
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.read32 = ssb_pcmcia_read32,
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.write16 = ssb_pcmcia_write16,
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.write32 = ssb_pcmcia_write32,
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};
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int ssb_pcmcia_get_invariants(struct ssb_bus *bus,
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struct ssb_init_invariants *iv)
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{
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//TODO
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return 0;
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}
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int ssb_pcmcia_init(struct ssb_bus *bus)
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{
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conf_reg_t reg;
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int err;
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if (bus->bustype != SSB_BUSTYPE_PCMCIA)
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return 0;
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/* Switch segment to a known state and sync
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* bus->mapped_pcmcia_seg with hardware state. */
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ssb_pcmcia_switch_segment(bus, 0);
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/* Init IRQ routing */
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reg.Action = CS_READ;
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reg.Function = 0;
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if (bus->chip_id == 0x4306)
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reg.Offset = 0x00;
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else
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reg.Offset = 0x80;
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err = pcmcia_access_configuration_register(bus->host_pcmcia, ®);
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if (err != CS_SUCCESS)
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goto error;
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reg.Action = CS_WRITE;
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reg.Value |= 0x04 | 0x01;
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err = pcmcia_access_configuration_register(bus->host_pcmcia, ®);
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if (err != CS_SUCCESS)
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goto error;
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return 0;
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error:
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return -ENODEV;
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}
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