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42c88ed264
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@11843 3c298f89-4303-0410-b956-a3cf2f4a3e73
95 lines
2.9 KiB
C
95 lines
2.9 KiB
C
/*
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****************************************************************************
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* Carsten Langgaard, carstenl@mips.com
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* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
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*
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***************************************************************************
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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*
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****************************************************************************
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*
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* Setting up the clock on the MIPS boards.
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*
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****************************************************************************
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* P. Sadik Oct 10, 2003
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*
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* Started change log.
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* mips_counter_frequency is now calculated at run time, based on idt_cpu_freq.
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* Code cleanup
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****************************************************************************
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*/
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#include <linux/autoconf.h>
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#include <linux/init.h>
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#include <linux/kernel_stat.h>
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#include <linux/sched.h>
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#include <linux/spinlock.h>
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#include <linux/mc146818rtc.h>
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#include <linux/irq.h>
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#include <linux/timex.h>
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#include <asm/irq_cpu.h>
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#include <asm/mipsregs.h>
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#include <asm/ptrace.h>
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#include <asm/debug.h>
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#include <asm/rc32434/rc32434.h>
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static unsigned long r4k_offset; /* Amount to incr compare reg each time */
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static unsigned long r4k_cur; /* What counter should be at next timer irq */
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extern unsigned int mips_hpt_frequency;
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extern unsigned int idt_cpu_freq;
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/*
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* Figure out the r4k offset, the amount to increment the compare
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* register for each time tick. There is no RTC available.
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*
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* The RC32434 counts at half the CPU *core* speed.
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*/
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static unsigned long __init cal_r4koff(void)
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{
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mips_hpt_frequency = idt_cpu_freq * IDT_CLOCK_MULT / 2;
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return (mips_hpt_frequency / HZ);
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}
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void __init rc32434_time_init(void)
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{
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unsigned int est_freq, flags;
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local_irq_save(flags);
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printk("calculating r4koff... ");
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r4k_offset = cal_r4koff();
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printk("%08lx(%d)\n", r4k_offset, (int) r4k_offset);
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est_freq = 2*r4k_offset*HZ;
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est_freq += 5000; /* round */
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est_freq -= est_freq%10000;
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printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
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(est_freq%1000000)*100/1000000);
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local_irq_restore(flags);
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}
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void __init plat_timer_setup(struct irqaction *irq)
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{
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/* we are using the cpu counter for timer interrupts */
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setup_irq(MIPS_CPU_TIMER_IRQ, irq);
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/* to generate the first timer interrupt */
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r4k_cur = (read_c0_count() + r4k_offset);
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write_c0_compare(r4k_cur);
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}
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