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571d12ab3a
When starting/stopping DMA sometimes the FIFO state gets corrupted, leading to wildly fluctuating latencies or packet data corruption. Fix this by issuing a fast MAC reset as soon as the link is detected as up. Fixes #9689, #9405 git-svn-id: svn://svn.openwrt.org/openwrt/trunk@27896 3c298f89-4303-0410-b956-a3cf2f4a3e73 |
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