mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-26 10:56:26 +02:00
41be3a0bd3
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33335 3c298f89-4303-0410-b956-a3cf2f4a3e73
40 lines
1.3 KiB
Diff
40 lines
1.3 KiB
Diff
From c9a552f3007f0621b2440ae17bad816578299e52 Mon Sep 17 00:00:00 2001
|
|
From: Gabor Juhos <juhosg@openwrt.org>
|
|
Date: Sun, 24 Jun 2012 13:45:27 +0200
|
|
Subject: [PATCH 20/34] MIPS: ath79: add GPIO setup code for the QCA955X SoCs
|
|
|
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|
---
|
|
arch/mips/ath79/gpio.c | 4 +++-
|
|
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 1 +
|
|
2 files changed, 4 insertions(+), 1 deletions(-)
|
|
|
|
--- a/arch/mips/ath79/gpio.c
|
|
+++ b/arch/mips/ath79/gpio.c
|
|
@@ -196,12 +196,14 @@ void __init ath79_gpio_init(void)
|
|
ath79_gpio_count = AR933X_GPIO_COUNT;
|
|
else if (soc_is_ar934x())
|
|
ath79_gpio_count = AR934X_GPIO_COUNT;
|
|
+ else if (soc_is_qca955x())
|
|
+ ath79_gpio_count = QCA955X_GPIO_COUNT;
|
|
else
|
|
BUG();
|
|
|
|
ath79_gpio_base = ioremap_nocache(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE);
|
|
ath79_gpio_chip.ngpio = ath79_gpio_count;
|
|
- if (soc_is_ar934x()) {
|
|
+ if (soc_is_ar934x() || soc_is_qca955x()) {
|
|
ath79_gpio_chip.direction_input = ar934x_gpio_direction_input;
|
|
ath79_gpio_chip.direction_output = ar934x_gpio_direction_output;
|
|
}
|
|
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
|
|
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
|
|
@@ -506,6 +506,7 @@
|
|
#define AR913X_GPIO_COUNT 22
|
|
#define AR933X_GPIO_COUNT 30
|
|
#define AR934X_GPIO_COUNT 23
|
|
+#define QCA955X_GPIO_COUNT 24
|
|
|
|
/*
|
|
* SRIF block
|