mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-28 00:31:54 +02:00
df88996997
The nand subtarget is not working yet. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33983 3c298f89-4303-0410-b956-a3cf2f4a3e73
67 lines
1.8 KiB
Diff
67 lines
1.8 KiB
Diff
--- a/arch/mips/ath79/irq.c
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+++ b/arch/mips/ath79/irq.c
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@@ -35,44 +35,17 @@ static void ath79_misc_irq_handler(unsig
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pending = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS) &
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__raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
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- if (pending & MISC_INT_UART)
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- generic_handle_irq(ATH79_MISC_IRQ_UART);
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-
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- else if (pending & MISC_INT_DMA)
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- generic_handle_irq(ATH79_MISC_IRQ_DMA);
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-
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- else if (pending & MISC_INT_PERFC)
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- generic_handle_irq(ATH79_MISC_IRQ_PERFC);
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-
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- else if (pending & MISC_INT_TIMER)
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- generic_handle_irq(ATH79_MISC_IRQ_TIMER);
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-
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- else if (pending & MISC_INT_TIMER2)
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- generic_handle_irq(ATH79_MISC_IRQ_TIMER2);
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-
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- else if (pending & MISC_INT_TIMER3)
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- generic_handle_irq(ATH79_MISC_IRQ_TIMER3);
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-
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- else if (pending & MISC_INT_TIMER4)
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- generic_handle_irq(ATH79_MISC_IRQ_TIMER4);
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-
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- else if (pending & MISC_INT_OHCI)
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- generic_handle_irq(ATH79_MISC_IRQ_OHCI);
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-
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- else if (pending & MISC_INT_ERROR)
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- generic_handle_irq(ATH79_MISC_IRQ_ERROR);
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-
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- else if (pending & MISC_INT_GPIO)
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- generic_handle_irq(ATH79_MISC_IRQ_GPIO);
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-
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- else if (pending & MISC_INT_WDOG)
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- generic_handle_irq(ATH79_MISC_IRQ_WDOG);
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+ if (!pending) {
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+ spurious_interrupt();
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+ return;
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+ }
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- else if (pending & MISC_INT_ETHSW)
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- generic_handle_irq(ATH79_MISC_IRQ_ETHSW);
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+ while (pending) {
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+ int bit = __ffs(pending);
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- else
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- spurious_interrupt();
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+ generic_handle_irq(ATH79_MISC_IRQ(bit));
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+ pending &= ~BIT(bit);
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+ }
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}
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static void ar71xx_misc_irq_unmask(struct irq_data *d)
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--- a/arch/mips/include/asm/mach-ath79/irq.h
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+++ b/arch/mips/include/asm/mach-ath79/irq.h
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@@ -14,6 +14,7 @@
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#define ATH79_MISC_IRQ_BASE 8
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#define ATH79_MISC_IRQ_COUNT 32
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+#define ATH79_MISC_IRQ(_x) (ATH79_MISC_IRQ_BASE + (_x))
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#define ATH79_PCI_IRQ_BASE (ATH79_MISC_IRQ_BASE + ATH79_MISC_IRQ_COUNT)
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#define ATH79_PCI_IRQ_COUNT 6
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