mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-29 05:53:44 +02:00
dc3d3f1c49
it's basically also provided by ingenic and nativly based on 2.6.27, adjusted to fit into the OpenWrt-environment
293 lines
9.0 KiB
C
293 lines
9.0 KiB
C
/*
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* linux/arch/mips/jz4730/proc.c
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*
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* /proc/jz/ procfs for on-chip peripherals.
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*
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* Copyright (c) 2006-2007 Ingenic Semiconductor Inc.
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* Author: <jlwei@ingenic.cn>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/sysctl.h>
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#include <linux/proc_fs.h>
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#include <asm/uaccess.h>
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#include <asm/jzsoc.h>
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struct proc_dir_entry *proc_jz_root;
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/*
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* EMC Module
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*/
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static int emc_read_proc (char *page, char **start, off_t off,
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int count, int *eof, void *data)
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{
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int len = 0;
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len += sprintf (page+len, "BCR: 0x%08x\n", REG_EMC_BCR);
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len += sprintf (page+len, "SMCR(0-5): 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", REG_EMC_SMCR0, REG_EMC_SMCR1, REG_EMC_SMCR2, REG_EMC_SMCR3, REG_EMC_SMCR4, REG_EMC_SMCR5);
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len += sprintf (page+len, "SACR(0-5): 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", REG_EMC_SACR0, REG_EMC_SACR1, REG_EMC_SACR2, REG_EMC_SACR3, REG_EMC_SACR4, REG_EMC_SACR5);
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len += sprintf (page+len, "DMCR: 0x%08x\n", REG_EMC_DMCR);
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len += sprintf (page+len, "RTCSR: 0x%04x\n", REG_EMC_RTCSR);
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len += sprintf (page+len, "RTCOR: 0x%04x\n", REG_EMC_RTCOR);
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len += sprintf (page+len, "DMAR(0-1): 0x%08x 0x%08x\n", REG_EMC_DMAR1, REG_EMC_DMAR2);
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return len;
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}
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/*
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* Power Manager Module
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*/
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static int pmc_read_proc (char *page, char **start, off_t off,
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int count, int *eof, void *data)
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{
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int len = 0;
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unsigned long lpcr = REG_CPM_LPCR;
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unsigned long mscr = REG_CPM_MSCR;
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len += sprintf (page+len, "LPCR : 0x%08lx\n", lpcr);
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len += sprintf (page+len, "Low Power Mode : %s\n",
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((lpcr & CPM_LPCR_LPM_MASK) == (CPM_LPCR_LPM_IDLE)) ?
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"idle" : (((lpcr & CPM_LPCR_LPM_MASK) == (CPM_LPCR_LPM_SLEEP)) ? "sleep" : "hibernate"));
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len += sprintf (page+len, "Doze Mode : %s\n",
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(lpcr & CPM_LPCR_DOZE) ? "on" : "off");
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if (lpcr & CPM_LPCR_DOZE)
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len += sprintf (page+len, " duty : %d\n", (int)((lpcr & CPM_LPCR_DUTY_MASK) >> CPM_LPCR_DUTY_BIT));
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len += sprintf (page+len, "CKO1 : %s\n",
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(REG_CPM_CFCR & CPM_CFCR_CKOEN1) ? "enable" : "disable");
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len += sprintf (page+len, "UART0 : %s\n",
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(mscr & CPM_MSCR_MSTP_UART0) ? "stopped" : "running");
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len += sprintf (page+len, "UART1 : %s\n",
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(mscr & CPM_MSCR_MSTP_UART1) ? "stopped" : "running");
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len += sprintf (page+len, "UART2 : %s\n",
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(mscr & CPM_MSCR_MSTP_UART2) ? "stopped" : "running");
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len += sprintf (page+len, "UART3 : %s\n",
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(mscr & CPM_MSCR_MSTP_UART3) ? "stopped" : "running");
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len += sprintf (page+len, "OST : %s\n",
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(mscr & CPM_MSCR_MSTP_OST) ? "stopped" : "running");
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len += sprintf (page+len, "DMAC : %s\n",
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(mscr & CPM_MSCR_MSTP_DMAC) ? "stopped" : "running");
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len += sprintf (page+len, "ETH : %s\n",
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(mscr & CPM_MSCR_MSTP_ETH) ? "stopped" : "running");
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len += sprintf (page+len, "UHC/UDC : %s\n",
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(mscr & CPM_MSCR_MSTP_UHC) ? "stopped" : "running");
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len += sprintf (page+len, "PWM0 : %s\n",
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(mscr & CPM_MSCR_MSTP_PWM0) ? "stopped" : "running");
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len += sprintf (page+len, "PWM1 : %s\n",
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(mscr & CPM_MSCR_MSTP_PWM1) ? "stopped" : "running");
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len += sprintf (page+len, "I2C : %s\n",
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(mscr & CPM_MSCR_MSTP_I2C) ? "stopped" : "running");
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len += sprintf (page+len, "SSI : %s\n",
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(mscr & CPM_MSCR_MSTP_SSI) ? "stopped" : "running");
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len += sprintf (page+len, "SCC : %s\n",
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(mscr & CPM_MSCR_MSTP_SCC) ? "stopped" : "running");
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return len;
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}
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static int pmc_write_proc(struct file *file, const char __user *buffer, unsigned long count, void *data)
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{
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REG_CPM_MSCR = simple_strtoul(buffer, 0, 16);
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return count;
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}
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/*
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* Clock Generation Module
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*/
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static int cgm_read_proc (char *page, char **start, off_t off,
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int count, int *eof, void *data)
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{
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int len = 0;
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unsigned int cfcr = REG_CPM_CFCR;
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unsigned int plcr1 = REG_CPM_PLCR1;
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unsigned int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32};
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unsigned int od[4] = {1, 2, 2, 4};
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len += sprintf (page+len, "PLCR1 : 0x%08x\n", plcr1);
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len += sprintf (page+len, "CFCR : 0x%08x\n", cfcr);
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len += sprintf (page+len, "PLL : %s\n",
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(plcr1 & CPM_PLCR1_PLL1EN) ? "ON" : "OFF");
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len += sprintf (page+len, "NF:NR:NO : %d:%d:%d\n",
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__cpm_plcr1_fd() + 2,
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__cpm_plcr1_rd() + 2,
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od[__cpm_plcr1_od()]
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);
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len += sprintf (page+len, "I:S:M:P : %d:%d:%d:%d\n",
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div[(cfcr & CPM_CFCR_IFR_MASK) >> CPM_CFCR_IFR_BIT],
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div[(cfcr & CPM_CFCR_SFR_MASK) >> CPM_CFCR_SFR_BIT],
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div[(cfcr & CPM_CFCR_MFR_MASK) >> CPM_CFCR_MFR_BIT],
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div[(cfcr & CPM_CFCR_PFR_MASK) >> CPM_CFCR_PFR_BIT]
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);
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len += sprintf (page+len, "PLL Freq : %d MHz\n", __cpm_get_pllout()/1000000);
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len += sprintf (page+len, "ICLK : %d MHz\n", __cpm_get_iclk()/1000000);
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len += sprintf (page+len, "SCLK : %d MHz\n", __cpm_get_sclk()/1000000);
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len += sprintf (page+len, "MCLK : %d MHz\n", __cpm_get_mclk()/1000000);
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len += sprintf (page+len, "PCLK : %d MHz\n", __cpm_get_pclk()/1000000);
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len += sprintf (page+len, "DEVCLK : %d MHz\n", __cpm_get_devclk()/1000000);
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len += sprintf (page+len, "RTCCLK : %d KHz\n", __cpm_get_rtcclk()/1000);
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len += sprintf (page+len, "USBCLK : %d MHz\n", __cpm_get_usbclk()/1000000);
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#if defined(CONFIG_FB_JZ)
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len += sprintf (page+len, "LCDCLK : %d MHz\n", __cpm_get_lcdclk()/1000000);
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len += sprintf (page+len, "PIXCLK : %d MHz\n", __cpm_get_pixclk()/1000000);
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#endif
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return len;
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}
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static int cgm_write_proc(struct file *file, const char *buffer, unsigned long count, void *data)
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{
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REG_CPM_CFCR = simple_strtoul(buffer, 0, 16);
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return count;
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}
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/*
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* WDT
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*/
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static int wdt_read_proc (char *page, char **start, off_t off,
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int count, int *eof, void *data)
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{
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int len = 0;
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len += sprintf (page+len, "WDT_WTCSR : 0x%08x\n", REG_WDT_WTCSR);
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len += sprintf (page+len, "WDT_WTCNT : 0x%08x\n", REG_WDT_WTCNT);
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return len;
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}
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static int wdt_write_proc(struct file *file, const char *buffer, unsigned long count, void *data)
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{
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unsigned long cnt = simple_strtoul(buffer, 0, 16);
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REG_WDT_WTCNT = cnt;
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REG_WDT_WTCSR = WDT_WTCSR_START;
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return count;
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}
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/*
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* PWM
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*/
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static int proc_jz_pwm_read_byte(char *page, char **start, off_t off,
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int count, int *eof, void *data)
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{
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return sprintf (page, "0x%02x\n", REG8(data));
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}
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static int proc_jz_pwm_read_word(char *page, char **start, off_t off,
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int count, int *eof, void *data)
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{
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return sprintf (page, "0x%04x\n", REG16(data));
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}
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static int proc_jz_pwm_write_byte(struct file *file, const char *buffer, unsigned long count, void *data)
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{
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REG8(data) = simple_strtoul(buffer, 0, 16);
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return count;
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}
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static int proc_jz_pwm_write_word(struct file *file, const char *buffer, unsigned long count, void *data)
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{
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REG16(data) = simple_strtoul(buffer, 0, 16);
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return count;
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}
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#define PWM_NUM 2
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static int jz_pwm_proc_init(void)
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{
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struct proc_dir_entry *proc_jz_pwm, *res;
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char name[16];
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unsigned char i;
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for (i = 0; i < PWM_NUM; i++) {
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sprintf(name, "pwm%d", i);
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proc_jz_pwm = proc_mkdir(name, proc_jz_root);
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res = create_proc_entry("control", 0600, proc_jz_pwm);
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if ( res) {
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res->read_proc = proc_jz_pwm_read_byte;
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res->write_proc = proc_jz_pwm_write_byte;
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if (i)
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res->data = (void * )PWM_CTR(1);
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else
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res->data = (void * )PWM_CTR(0);
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}
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res = create_proc_entry("period", 0600, proc_jz_pwm);
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if ( res) {
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res->read_proc = proc_jz_pwm_read_word;
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res->write_proc = proc_jz_pwm_write_word;
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if (i)
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res->data = (void *)PWM_PER(1);
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else
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res->data = (void *)PWM_PER(0);
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}
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res = create_proc_entry("duty", 0600, proc_jz_pwm);
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if ( res) {
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res->read_proc = proc_jz_pwm_read_word;
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res->write_proc = proc_jz_pwm_write_word;
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if (i)
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res->data = (void * )PWM_DUT(1);
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else
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res->data = (void * )PWM_DUT(0);
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}
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}
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return 0;
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}
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/*
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* /proc/jz/xxx entry
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*
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*/
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static int __init jz_proc_init(void)
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{
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struct proc_dir_entry *entry;
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/* create /proc/jz */
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proc_jz_root = proc_mkdir("jz", 0);
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/* create /proc/jz/emc */
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entry = create_proc_entry("emc", 0644, proc_jz_root);
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if (entry) {
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entry->read_proc = emc_read_proc;
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entry->write_proc = NULL;
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entry->data = NULL;
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}
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/* create /proc/jz/pmc */
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entry = create_proc_entry("pmc", 0644, proc_jz_root);
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if (entry) {
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entry->read_proc = pmc_read_proc;
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entry->write_proc = pmc_write_proc;
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entry->data = NULL;
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}
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/* create /proc/jz/cgm */
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entry = create_proc_entry("cgm", 0644, proc_jz_root);
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if (entry) {
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entry->read_proc = cgm_read_proc;
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entry->write_proc = cgm_write_proc;
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entry->data = NULL;
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}
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/* create /proc/jz/wdt */
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entry = create_proc_entry("wdt", 0644, proc_jz_root);
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if (entry) {
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entry->read_proc = wdt_read_proc;
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entry->write_proc = wdt_write_proc;
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entry->data = NULL;
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}
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/* PWM */
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jz_pwm_proc_init();
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return 0;
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}
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__initcall(jz_proc_init);
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