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d8db515de0
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@30346 3c298f89-4303-0410-b956-a3cf2f4a3e73
135 lines
4.5 KiB
Diff
135 lines
4.5 KiB
Diff
From 4f214b1ead0af7439921637645cb63f378516175 Mon Sep 17 00:00:00 2001
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From: Hauke Mehrtens <hauke@hauke-m.de>
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Date: Sat, 21 Jan 2012 18:48:38 +0100
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Subject: [PATCH 33/34] b43: add workaround for b43 on pcie bus of bcm4716.
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bcm4716 (which includes 4717 & 4718), plus 4706 on PCIe can reorder
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transactions. As a fix, a read after write is performed on certain
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places in the code. Older chips and the newer 5357 family don't require
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this fix.
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This code is based on the brcmsmac driver.
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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---
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drivers/net/wireless/b43/b43.h | 26 ++++++++++++++++++++++++++
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drivers/net/wireless/b43/bus.h | 10 ++++++++++
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drivers/net/wireless/b43/phy_common.c | 6 ++++++
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drivers/net/wireless/b43/phy_n.c | 10 +++++-----
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4 files changed, 47 insertions(+), 5 deletions(-)
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--- a/drivers/net/wireless/b43/b43.h
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+++ b/drivers/net/wireless/b43/b43.h
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@@ -1044,6 +1044,32 @@ static inline bool b43_using_pio_transfe
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return dev->__using_pio_transfers;
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}
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+/*
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+ * bcm4716 (which includes 4717 & 4718), plus 4706 on PCIe can reorder
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+ * transactions. As a fix, a read after write is performed on certain places
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+ * in the code. Older chips and the newer 5357 family don't require this fix.
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+ */
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+#ifdef CONFIG_BCM47XX_BCMA
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+#include <asm/mach-bcm47xx/bcm47xx.h>
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+static inline void b43_wflush16(struct b43_wldev *dev, u16 offset, u16 value)
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+{
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+ if (b43_bus_host_is_pci(dev->dev) &&
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+ bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA &&
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+ (bcm47xx_bus.bcma.bus.chipinfo.id == 0x4716 ||
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+ bcm47xx_bus.bcma.bus.chipinfo.id == 0x5300)) {
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+ b43_write16(dev, offset, value);
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+ b43_read16(dev, offset);
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+ } else {
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+ b43_write16(dev, offset, value);
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+ }
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+}
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+#else
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+static inline void b43_wflush16(struct b43_wldev *dev, u16 offset, u16 value)
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+{
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+ b43_write16(dev, offset, value);
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+}
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+#endif
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+
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/* Message printing */
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__printf(2, 3) void b43info(struct b43_wl *wl, const char *fmt, ...);
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__printf(2, 3) void b43err(struct b43_wl *wl, const char *fmt, ...);
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--- a/drivers/net/wireless/b43/bus.h
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+++ b/drivers/net/wireless/b43/bus.h
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@@ -60,6 +60,16 @@ static inline bool b43_bus_host_is_sdio(
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return (dev->bus_type == B43_BUS_SSB &&
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dev->sdev->bus->bustype == SSB_BUSTYPE_SDIO);
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}
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+static inline bool b43_bus_host_is_pci(struct b43_bus_dev *dev)
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+{
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+ if (dev->bus_type == B43_BUS_SSB)
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+ return (dev->sdev->bus->bustype == SSB_BUSTYPE_PCI);
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+#ifdef CONFIG_B43_BCMA
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+ if (dev->bus_type == B43_BUS_BCMA)
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+ return (dev->bdev->bus->hosttype == BCMA_HOSTTYPE_PCI);
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+#endif
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+ return false;
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+}
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struct b43_bus_dev *b43_bus_dev_bcma_init(struct bcma_device *core);
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struct b43_bus_dev *b43_bus_dev_ssb_init(struct ssb_device *sdev);
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--- a/drivers/net/wireless/b43/phy_common.c
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+++ b/drivers/net/wireless/b43/phy_common.c
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@@ -251,6 +251,12 @@ void b43_phy_write(struct b43_wldev *dev
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{
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assert_mac_suspended(dev);
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dev->phy.ops->phy_write(dev, reg, value);
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+#ifdef CONFIG_BCM47XX
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+ if (b43_bus_host_is_pci(dev->dev) && reg == 0x72) {
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+ b43_read16(dev, B43_MMIO_PHY_VER);
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+ return;
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+ }
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+#endif
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if (++dev->phy.writes_counter == B43_MAX_WRITES_IN_ROW) {
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b43_read16(dev, B43_MMIO_PHY_VER);
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dev->phy.writes_counter = 0;
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--- a/drivers/net/wireless/b43/phy_n.c
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+++ b/drivers/net/wireless/b43/phy_n.c
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@@ -4837,14 +4837,14 @@ static inline void check_phyreg(struct b
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static u16 b43_nphy_op_read(struct b43_wldev *dev, u16 reg)
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{
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check_phyreg(dev, reg);
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- b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
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+ b43_wflush16(dev, B43_MMIO_PHY_CONTROL, reg);
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return b43_read16(dev, B43_MMIO_PHY_DATA);
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}
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static void b43_nphy_op_write(struct b43_wldev *dev, u16 reg, u16 value)
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{
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check_phyreg(dev, reg);
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- b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
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+ b43_wflush16(dev, B43_MMIO_PHY_CONTROL, reg);
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b43_write16(dev, B43_MMIO_PHY_DATA, value);
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}
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@@ -4852,7 +4852,7 @@ static void b43_nphy_op_maskset(struct b
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u16 set)
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{
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check_phyreg(dev, reg);
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- b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
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+ b43_wflush16(dev, B43_MMIO_PHY_CONTROL, reg);
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b43_maskset16(dev, B43_MMIO_PHY_DATA, mask, set);
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}
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@@ -4863,7 +4863,7 @@ static u16 b43_nphy_op_radio_read(struct
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/* N-PHY needs 0x100 for read access */
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reg |= 0x100;
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- b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg);
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+ b43_wflush16(dev, B43_MMIO_RADIO_CONTROL, reg);
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return b43_read16(dev, B43_MMIO_RADIO_DATA_LOW);
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}
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@@ -4872,7 +4872,7 @@ static void b43_nphy_op_radio_write(stru
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/* Register 1 is a 32-bit register. */
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B43_WARN_ON(reg == 1);
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- b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg);
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+ b43_wflush16(dev, B43_MMIO_RADIO_CONTROL, reg);
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b43_write16(dev, B43_MMIO_RADIO_DATA_LOW, value);
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}
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