mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-09-12 09:33:20 +03:00
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@13135 3c298f89-4303-0410-b956-a3cf2f4a3e73
247 lines
6.7 KiB
Diff
247 lines
6.7 KiB
Diff
--- a/drivers/net/arm/ixp4xx_eth.c
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+++ b/drivers/net/arm/ixp4xx_eth.c
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@@ -165,14 +165,15 @@ struct port {
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struct net_device *netdev;
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struct napi_struct napi;
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struct net_device_stats stat;
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- struct mii_if_info mii;
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+ struct mii_if_info mii[IXP4XX_ETH_PHY_MAX_ADDR];
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struct delayed_work mdio_thread;
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struct eth_plat_info *plat;
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buffer_t *rx_buff_tab[RX_DESCS], *tx_buff_tab[TX_DESCS];
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struct desc *desc_tab; /* coherent */
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u32 desc_tab_phys;
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int id; /* logical port ID */
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- u16 mii_bmcr;
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+ u16 mii_bmcr[IXP4XX_ETH_PHY_MAX_ADDR];
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+ int phy_count;
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};
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/* NPE message structure */
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@@ -316,12 +317,13 @@ static void mdio_write(struct net_device
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spin_unlock_irqrestore(&mdio_lock, flags);
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}
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-static void phy_reset(struct net_device *dev, int phy_id)
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+static void phy_reset(struct net_device *dev, int idx)
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{
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struct port *port = netdev_priv(dev);
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+ int phy_id = port->mii[idx].phy_id;
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int cycles = 0;
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- mdio_write(dev, phy_id, MII_BMCR, port->mii_bmcr | BMCR_RESET);
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+ mdio_write(dev, phy_id, MII_BMCR, port->mii_bmcr[idx] | BMCR_RESET);
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while (cycles < MAX_MII_RESET_RETRIES) {
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if (!(mdio_read(dev, phy_id, MII_BMCR) & BMCR_RESET)) {
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@@ -335,12 +337,12 @@ static void phy_reset(struct net_device
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cycles++;
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}
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- printk(KERN_ERR "%s: MII reset failed\n", dev->name);
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+ printk(KERN_ERR "%s: MII reset failed on PHY%2d\n", dev->name, phy_id);
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}
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-static void eth_set_duplex(struct port *port)
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+static void eth_set_duplex(struct port *port, int full_duplex)
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{
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- if (port->mii.full_duplex)
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+ if (full_duplex)
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__raw_writel(DEFAULT_TX_CNTRL0 & ~TX_CNTRL0_HALFDUPLEX,
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&port->regs->tx_control[0]);
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else
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@@ -348,7 +350,7 @@ static void eth_set_duplex(struct port *
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&port->regs->tx_control[0]);
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}
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-
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+#if 0
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static void phy_check_media(struct port *port, int init)
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{
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if (mii_check_media(&port->mii, 1, init))
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@@ -367,7 +369,63 @@ static void phy_check_media(struct port
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}
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}
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}
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+#else
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+static void phy_update_link(struct net_device *dev, int link)
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+{
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+ int prev_link = netif_carrier_ok(dev);
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+
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+ if (!prev_link && link) {
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+ printk(KERN_INFO "%s: link up\n", dev->name);
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+ netif_carrier_on(dev);
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+ } else if (prev_link && !link) {
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+ printk(KERN_INFO "%s: link down\n", dev->name);
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+ netif_carrier_off(dev);
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+ }
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+}
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+
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+static void phy_check_media(struct port *port, int init)
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+{
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+ struct net_device *dev = port->netdev;
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+
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+ if (port->phy_count == 1) {
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+ struct mii_if_info *mii = &port->mii[0];
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+
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+ if (mii_check_media(mii, 1, init))
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+ eth_set_duplex(port, mii->full_duplex);
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+
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+ if (mii->force_media) /* mii_check_media() doesn't work */
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+ phy_update_link(dev, mii_link_ok(mii));
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+ } else {
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+ int cur_link = 0;
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+ int i;
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+
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+ if (init)
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+ eth_set_duplex(port, 1);
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+
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+ for (i = 0; i < port->phy_count; i++)
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+ cur_link |= mii_link_ok(&port->mii[i]);
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+
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+ phy_update_link(dev, cur_link);
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+ }
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+}
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+#endif
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+
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+static void phy_power_down(struct net_device *dev, int idx)
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+{
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+ struct port *port = netdev_priv(dev);
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+ int phy_id = port->mii[idx].phy_id;
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+
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+ port->mii_bmcr[idx] = mdio_read(dev, phy_id, MII_BMCR) &
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+ ~(BMCR_RESET | BMCR_PDOWN);
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+ mdio_write(dev, phy_id, MII_BMCR, port->mii_bmcr[idx] | BMCR_PDOWN);
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+}
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+
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+static void phy_power_up(struct net_device *dev, int idx)
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+{
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+ struct port *port = netdev_priv(dev);
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+ mdio_write(dev, port->mii[idx].phy_id, MII_BMCR, port->mii_bmcr[idx]);
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+}
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static void mdio_thread(struct work_struct *work)
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{
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@@ -792,9 +850,12 @@ static int eth_ioctl(struct net_device *
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if (!netif_running(dev))
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return -EINVAL;
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- err = generic_mii_ioctl(&port->mii, if_mii(req), cmd, &duplex_chg);
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+ if (port->phy_count != 1)
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+ return -EOPNOTSUPP;
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+
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+ err = generic_mii_ioctl(&port->mii[0], if_mii(req), cmd, &duplex_chg);
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if (duplex_chg)
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- eth_set_duplex(port);
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+ eth_set_duplex(port, port->mii[0].full_duplex);
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return err;
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}
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@@ -947,7 +1008,8 @@ static int eth_open(struct net_device *d
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}
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}
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- mdio_write(dev, port->plat->phy, MII_BMCR, port->mii_bmcr);
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+ for (i = 0; i < port->phy_count; i++)
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+ phy_power_up(dev, i);
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memset(&msg, 0, sizeof(msg));
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msg.cmd = NPE_VLAN_SETRXQOSENTRY;
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@@ -1107,10 +1169,8 @@ static int eth_close(struct net_device *
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printk(KERN_CRIT "%s: unable to disable loopback\n",
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dev->name);
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- port->mii_bmcr = mdio_read(dev, port->plat->phy, MII_BMCR) &
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- ~(BMCR_RESET | BMCR_PDOWN); /* may have been altered */
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- mdio_write(dev, port->plat->phy, MII_BMCR,
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- port->mii_bmcr | BMCR_PDOWN);
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+ for (i = 0; i < port->phy_count; i++)
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+ phy_power_down(dev, i);
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if (!ports_open)
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qmgr_disable_irq(TXDONE_QUEUE);
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@@ -1120,6 +1180,42 @@ static int eth_close(struct net_device *
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return 0;
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}
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+static void eth_add_phy(struct net_device *dev, int phy_id)
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+{
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+ struct port *port = netdev_priv(dev);
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+ int i;
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+
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+ i = port->phy_count++;
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+
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+ port->mii[i].dev = dev;
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+ port->mii[i].mdio_read = mdio_read;
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+ port->mii[i].mdio_write = mdio_write;
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+ port->mii[i].phy_id = phy_id;
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+ port->mii[i].phy_id_mask = 0x1F;
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+ port->mii[i].reg_num_mask = 0x1F;
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+
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+ printk(KERN_INFO "%s: MII PHY %i on %s\n", dev->name, phy_id,
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+ npe_name(port->npe));
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+
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+ phy_reset(dev, i);
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+ phy_power_down(dev, i);
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+}
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+
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+static void eth_init_mii(struct net_device *dev)
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+{
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+ struct port *port = netdev_priv(dev);
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+
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+ if (port->plat->phy < IXP4XX_ETH_PHY_MAX_ADDR) {
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+ eth_add_phy(dev, port->plat->phy);
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+ } else {
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+ int i;
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+ for (i = 0; i < IXP4XX_ETH_PHY_MAX_ADDR; i++)
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+ if (port->plat->phy_mask & (1U << i))
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+ eth_add_phy(dev, i);
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+ }
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+
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+}
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+
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static int __devinit eth_init_one(struct platform_device *pdev)
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{
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struct port *port;
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@@ -1192,20 +1288,7 @@ static int __devinit eth_init_one(struct
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__raw_writel(DEFAULT_CORE_CNTRL, &port->regs->core_control);
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udelay(50);
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- port->mii.dev = dev;
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- port->mii.mdio_read = mdio_read;
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- port->mii.mdio_write = mdio_write;
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- port->mii.phy_id = plat->phy;
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- port->mii.phy_id_mask = 0x1F;
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- port->mii.reg_num_mask = 0x1F;
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-
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- printk(KERN_INFO "%s: MII PHY %i on %s\n", dev->name, plat->phy,
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- npe_name(port->npe));
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-
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- phy_reset(dev, plat->phy);
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- port->mii_bmcr = mdio_read(dev, plat->phy, MII_BMCR) &
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- ~(BMCR_RESET | BMCR_PDOWN);
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- mdio_write(dev, plat->phy, MII_BMCR, port->mii_bmcr | BMCR_PDOWN);
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+ eth_init_mii(dev);
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INIT_DELAYED_WORK(&port->mdio_thread, mdio_thread);
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return 0;
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--- a/include/asm-arm/arch-ixp4xx/platform.h
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+++ b/include/asm-arm/arch-ixp4xx/platform.h
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@@ -95,12 +95,15 @@ struct sys_timer;
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#define IXP4XX_ETH_NPEB 0x10
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#define IXP4XX_ETH_NPEC 0x20
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+#define IXP4XX_ETH_PHY_MAX_ADDR 32
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+
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/* Information about built-in Ethernet MAC interfaces */
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struct eth_plat_info {
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u8 phy; /* MII PHY ID, 0 - 31 */
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u8 rxq; /* configurable, currently 0 - 31 only */
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u8 txreadyq;
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u8 hwaddr[6];
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+ u32 phy_mask;
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};
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/* Information about built-in HSS (synchronous serial) interfaces */
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