mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-10-30 09:31:32 +02:00
efe0e0af7d
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@11195 3c298f89-4303-0410-b956-a3cf2f4a3e73
427 lines
12 KiB
Diff
427 lines
12 KiB
Diff
Index: linux-2.6.21.7/drivers/mmc/at91_mci.c
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===================================================================
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--- linux-2.6.21.7.orig/drivers/mmc/at91_mci.c
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+++ linux-2.6.21.7/drivers/mmc/at91_mci.c
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@@ -79,7 +79,8 @@
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#define DRIVER_NAME "at91_mci"
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-#undef SUPPORT_4WIRE
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+//#undef SUPPORT_4WIRE
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+#define SUPPORT_4WIRE
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#define FL_SENT_COMMAND (1 << 0)
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#define FL_SENT_STOP (1 << 1)
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@@ -132,7 +133,7 @@ struct at91mci_host
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/*
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* Copy from sg to a dma block - used for transfers
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*/
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-static inline void at91mci_sg_to_dma(struct at91mci_host *host, struct mmc_data *data)
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+static inline void at91_mci_sg_to_dma(struct at91mci_host *host, struct mmc_data *data)
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{
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unsigned int len, i, size;
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unsigned *dmabuf = host->buffer;
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@@ -181,7 +182,7 @@ static inline void at91mci_sg_to_dma(str
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/*
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* Prepare a dma read
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*/
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-static void at91mci_pre_dma_read(struct at91mci_host *host)
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+static void at91_mci_pre_dma_read(struct at91mci_host *host)
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{
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int i;
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struct scatterlist *sg;
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@@ -249,23 +250,24 @@ static void at91mci_pre_dma_read(struct
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/*
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* Handle after a dma read
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*/
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-static void at91mci_post_dma_read(struct at91mci_host *host)
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+static int at91_mci_post_dma_read(struct at91mci_host *host)
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{
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struct mmc_command *cmd;
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struct mmc_data *data;
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+ int completed = 0;
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pr_debug("post dma read\n");
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cmd = host->cmd;
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if (!cmd) {
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pr_debug("no command\n");
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- return;
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+ return 1;
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}
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data = cmd->data;
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if (!data) {
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pr_debug("no data\n");
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- return;
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+ return 1;
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}
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while (host->in_use_index < host->transfer_index) {
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@@ -300,39 +302,14 @@ static void at91mci_post_dma_read(struct
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/* Is there another transfer to trigger? */
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if (host->transfer_index < data->sg_len)
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- at91mci_pre_dma_read(host);
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+ at91_mci_pre_dma_read(host);
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else {
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+ at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_ENDRX);
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at91_mci_write(host, AT91_MCI_IER, AT91_MCI_RXBUFF);
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- at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
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}
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pr_debug("post dma read done\n");
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-}
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-
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-/*
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- * Handle transmitted data
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- */
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-static void at91_mci_handle_transmitted(struct at91mci_host *host)
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-{
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- struct mmc_command *cmd;
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- struct mmc_data *data;
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-
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- pr_debug("Handling the transmit\n");
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-
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- /* Disable the transfer */
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- at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
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-
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- /* Now wait for cmd ready */
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- at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_TXBUFE);
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- at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
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-
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- cmd = host->cmd;
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- if (!cmd) return;
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-
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- data = cmd->data;
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- if (!data) return;
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-
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- data->bytes_xfered = host->total_length;
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+ return completed;
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}
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/*
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@@ -340,10 +317,17 @@ static void at91_mci_handle_transmitted(
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*/
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static void at91_mci_enable(struct at91mci_host *host)
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{
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+ unsigned int mr;
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+
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at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN);
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at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
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at91_mci_write(host, AT91_MCI_DTOR, AT91_MCI_DTOMUL_1M | AT91_MCI_DTOCYC);
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- at91_mci_write(host, AT91_MCI_MR, AT91_MCI_PDCMODE | 0x34a);
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+ mr = AT91_MCI_PDCMODE | 0x34a;
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+
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+ if (cpu_is_at91sam9260() || cpu_is_at91sam9263())
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+ mr |= AT91_MCI_RDPROOF | AT91_MCI_WRPROOF;
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+
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+ at91_mci_write(host, AT91_MCI_MR, mr);
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/* use Slot A or B (only one at same time) */
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at91_mci_write(host, AT91_MCI_SDCR, host->board->slot_b);
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@@ -359,9 +343,8 @@ static void at91_mci_disable(struct at91
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/*
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* Send a command
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- * return the interrupts to enable
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*/
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-static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_command *cmd)
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+static void at91_mci_send_command(struct at91mci_host *host, struct mmc_command *cmd)
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{
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unsigned int cmdr, mr;
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unsigned int block_length;
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@@ -372,8 +355,7 @@ static unsigned int at91_mci_send_comman
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host->cmd = cmd;
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- /* Not sure if this is needed */
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-#if 0
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+ /* Needed for leaving busy state before CMD1 */
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if ((at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_RTOE) && (cmd->opcode == 1)) {
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pr_debug("Clearing timeout\n");
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at91_mci_write(host, AT91_MCI_ARGR, 0);
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@@ -383,7 +365,7 @@ static unsigned int at91_mci_send_comman
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pr_debug("Clearing: SR = %08X\n", at91_mci_read(host, AT91_MCI_SR));
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}
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}
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-#endif
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+
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cmdr = cmd->opcode;
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if (mmc_resp_type(cmd) == MMC_RSP_NONE)
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@@ -440,50 +422,48 @@ static unsigned int at91_mci_send_comman
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at91_mci_write(host, ATMEL_PDC_TCR, 0);
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at91_mci_write(host, ATMEL_PDC_TNPR, 0);
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at91_mci_write(host, ATMEL_PDC_TNCR, 0);
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+ ier = AT91_MCI_CMDRDY;
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+ } else {
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+ /* zero block length in PDC mode */
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+ mr = at91_mci_read(host, AT91_MCI_MR) & 0x7fff;
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+ at91_mci_write(host, AT91_MCI_MR, mr | (block_length << 16) | AT91_MCI_PDCMODE);
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+
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+ /*
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+ * Disable the PDC controller
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+ */
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+ at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
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- at91_mci_write(host, AT91_MCI_ARGR, cmd->arg);
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- at91_mci_write(host, AT91_MCI_CMDR, cmdr);
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- return AT91_MCI_CMDRDY;
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- }
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-
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- mr = at91_mci_read(host, AT91_MCI_MR) & 0x7fff; /* zero block length and PDC mode */
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- at91_mci_write(host, AT91_MCI_MR, mr | (block_length << 16) | AT91_MCI_PDCMODE);
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-
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- /*
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- * Disable the PDC controller
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- */
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- at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
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-
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- if (cmdr & AT91_MCI_TRCMD_START) {
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- data->bytes_xfered = 0;
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- host->transfer_index = 0;
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- host->in_use_index = 0;
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- if (cmdr & AT91_MCI_TRDIR) {
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- /*
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- * Handle a read
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- */
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- host->buffer = NULL;
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- host->total_length = 0;
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+ if (cmdr & AT91_MCI_TRCMD_START) {
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+ data->bytes_xfered = 0;
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+ host->transfer_index = 0;
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+ host->in_use_index = 0;
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+ if (cmdr & AT91_MCI_TRDIR) {
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+ /*
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+ * Handle a read
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+ */
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+ host->buffer = NULL;
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+ host->total_length = 0;
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- at91mci_pre_dma_read(host);
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- ier = AT91_MCI_ENDRX /* | AT91_MCI_RXBUFF */;
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- }
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- else {
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- /*
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- * Handle a write
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- */
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- host->total_length = block_length * blocks;
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- host->buffer = dma_alloc_coherent(NULL,
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- host->total_length,
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- &host->physical_address, GFP_KERNEL);
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-
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- at91mci_sg_to_dma(host, data);
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-
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- pr_debug("Transmitting %d bytes\n", host->total_length);
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-
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- at91_mci_write(host, ATMEL_PDC_TPR, host->physical_address);
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- at91_mci_write(host, ATMEL_PDC_TCR, host->total_length / 4);
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- ier = AT91_MCI_TXBUFE;
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+ at91_mci_pre_dma_read(host);
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+ ier = AT91_MCI_ENDRX /* | AT91_MCI_RXBUFF */;
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+ }
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+ else {
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+ /*
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+ * Handle a write
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+ */
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+ host->total_length = block_length * blocks;
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+ host->buffer = dma_alloc_coherent(NULL,
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+ host->total_length,
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+ &host->physical_address, GFP_KERNEL);
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+
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+ at91_mci_sg_to_dma(host, data);
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+
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+ pr_debug("Transmitting %d bytes\n", host->total_length);
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+
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+ at91_mci_write(host, ATMEL_PDC_TPR, host->physical_address);
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+ at91_mci_write(host, ATMEL_PDC_TCR, host->total_length / 4);
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+ ier = AT91_MCI_CMDRDY;
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+ }
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}
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}
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@@ -498,39 +478,24 @@ static unsigned int at91_mci_send_comman
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if (cmdr & AT91_MCI_TRCMD_START) {
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if (cmdr & AT91_MCI_TRDIR)
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at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN);
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- else
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- at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN);
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}
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- return ier;
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-}
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-/*
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- * Wait for a command to complete
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- */
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-static void at91mci_process_command(struct at91mci_host *host, struct mmc_command *cmd)
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-{
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- unsigned int ier;
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-
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- ier = at91_mci_send_command(host, cmd);
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-
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- pr_debug("setting ier to %08X\n", ier);
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-
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- /* Stop on errors or the required value */
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+ /* Enable selected interrupts */
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at91_mci_write(host, AT91_MCI_IER, AT91_MCI_ERRORS | ier);
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}
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/*
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* Process the next step in the request
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*/
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-static void at91mci_process_next(struct at91mci_host *host)
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+static void at91_mci_process_next(struct at91mci_host *host)
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{
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if (!(host->flags & FL_SENT_COMMAND)) {
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host->flags |= FL_SENT_COMMAND;
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- at91mci_process_command(host, host->request->cmd);
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+ at91_mci_send_command(host, host->request->cmd);
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}
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else if ((!(host->flags & FL_SENT_STOP)) && host->request->stop) {
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host->flags |= FL_SENT_STOP;
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- at91mci_process_command(host, host->request->stop);
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+ at91_mci_send_command(host, host->request->stop);
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}
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else
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mmc_request_done(host->mmc, host->request);
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@@ -539,7 +504,7 @@ static void at91mci_process_next(struct
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/*
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* Handle a command that has been completed
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*/
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-static void at91mci_completed_command(struct at91mci_host *host)
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+static void at91_mci_completed_command(struct at91mci_host *host)
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{
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struct mmc_command *cmd = host->cmd;
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unsigned int status;
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@@ -583,7 +548,7 @@ static void at91mci_completed_command(st
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else
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cmd->error = MMC_ERR_NONE;
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- at91mci_process_next(host);
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+ at91_mci_process_next(host);
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}
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/*
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@@ -595,7 +560,60 @@ static void at91_mci_request(struct mmc_
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host->request = mrq;
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host->flags = 0;
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- at91mci_process_next(host);
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+ at91_mci_process_next(host);
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+}
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+
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+/*
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+ * Handle transmitted data
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+ */
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+static void at91_mci_handle_transmitted(struct at91mci_host *host)
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+{
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+ struct mmc_command *cmd;
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+ struct mmc_data *data;
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+
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+ pr_debug("Handling the transmit\n");
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+
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+ /* Disable the transfer */
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+ at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
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+
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+ /* Now wait for cmd ready */
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+ at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_TXBUFE);
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+
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+ cmd = host->cmd;
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+ if (!cmd) return;
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+
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+ data = cmd->data;
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+ if (!data) return;
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+
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+ if (cmd->opcode == MMC_WRITE_MULTIPLE_BLOCK) {
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+ pr_debug("multiple write : wait for BLKE...\n");
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+ at91_mci_write(host, AT91_MCI_IER, AT91_MCI_BLKE);
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+ } else
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+ at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
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+
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+ data->bytes_xfered = host->total_length;
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+}
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+
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+
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+/*Handle after command sent ready*/
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+static int at91_mci_handle_cmdrdy(struct at91mci_host *host)
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+{
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+ if (!host->cmd)
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+ return 1;
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+ else if (!host->cmd->data) {
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+ if (host->flags & FL_SENT_STOP) {
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+ /*After multi block write, we mus wait for NOTBUSY*/
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+ at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
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+ } else return 1;
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+ } else if (host->cmd->data->flags & MMC_DATA_WRITE) {
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+ /*After sending multi-block-write command, start DMA transfer*/
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+ at91_mci_write(host, AT91_MCI_IER, AT91_MCI_TXBUFE);
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+ at91_mci_write(host, AT91_MCI_IER, AT91_MCI_BLKE);
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+ at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN);
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+ }
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+
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+ /* command not completed, have to wait */
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+ return 0;
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}
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/*
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@@ -698,29 +716,33 @@ static irqreturn_t at91_mci_irq(int irq,
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at91_mci_handle_transmitted(host);
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}
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+ if (int_status & AT91_MCI_ENDRX) {
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+ pr_debug("ENDRX\n");
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+ at91_mci_post_dma_read(host);
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+ }
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+
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if (int_status & AT91_MCI_RXBUFF) {
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pr_debug("RX buffer full\n");
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- at91_mci_write(host, AT91_MCI_IER, AT91_MCI_CMDRDY);
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+ at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
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+ at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_RXBUFF | AT91_MCI_ENDRX);
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+ completed = 1;
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}
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if (int_status & AT91_MCI_ENDTX)
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pr_debug("Transmit has ended\n");
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- if (int_status & AT91_MCI_ENDRX) {
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- pr_debug("Receive has ended\n");
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- at91mci_post_dma_read(host);
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- }
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-
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if (int_status & AT91_MCI_NOTBUSY) {
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pr_debug("Card is ready\n");
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- at91_mci_write(host, AT91_MCI_IER, AT91_MCI_CMDRDY);
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+ completed = 1;
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}
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if (int_status & AT91_MCI_DTIP)
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pr_debug("Data transfer in progress\n");
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- if (int_status & AT91_MCI_BLKE)
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+ if (int_status & AT91_MCI_BLKE) {
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pr_debug("Block transfer has ended\n");
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+ completed = 1;
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+ }
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if (int_status & AT91_MCI_TXRDY)
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pr_debug("Ready to transmit\n");
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@@ -730,14 +752,14 @@ static irqreturn_t at91_mci_irq(int irq,
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if (int_status & AT91_MCI_CMDRDY) {
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pr_debug("Command ready\n");
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- completed = 1;
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+ completed = at91_mci_handle_cmdrdy(host);
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}
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}
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if (completed) {
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pr_debug("Completed command\n");
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at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
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- at91mci_completed_command(host);
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+ at91_mci_completed_command(host);
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} else
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at91_mci_write(host, AT91_MCI_IDR, int_status);
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