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bb4a32bb81
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33538 3c298f89-4303-0410-b956-a3cf2f4a3e73
201 lines
5.1 KiB
C
201 lines
5.1 KiB
C
/*
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* D-Link DIR-825 rev. B1 board support
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*
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* Copyright (C) 2009-2011 Lukas Kuna, Evkanet, s.r.o.
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*
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* based on mach-wndr3700.c
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/rtl8366.h>
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#include <asm/mach-ath79/ath79.h>
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#include "dev-eth.h"
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#include "dev-ap9x-pci.h"
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#include "dev-gpio-buttons.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "dev-usb.h"
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#include "machtypes.h"
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#define DIR825B1_GPIO_LED_BLUE_USB 0
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#define DIR825B1_GPIO_LED_ORANGE_POWER 1
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#define DIR825B1_GPIO_LED_BLUE_POWER 2
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#define DIR825B1_GPIO_LED_BLUE_WPS 4
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#define DIR825B1_GPIO_LED_ORANGE_PLANET 6
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#define DIR825B1_GPIO_LED_BLUE_PLANET 11
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#define DIR825B1_GPIO_BTN_RESET 3
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#define DIR825B1_GPIO_BTN_WPS 8
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#define DIR825B1_GPIO_RTL8366_SDA 5
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#define DIR825B1_GPIO_RTL8366_SCK 7
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#define DIR825B1_KEYS_POLL_INTERVAL 20 /* msecs */
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#define DIR825B1_KEYS_DEBOUNCE_INTERVAL (3 * DIR825B1_KEYS_POLL_INTERVAL)
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#define DIR825B1_CAL0_OFFSET 0x1000
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#define DIR825B1_CAL1_OFFSET 0x5000
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#define DIR825B1_MAC0_OFFSET 0xffa0
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#define DIR825B1_MAC1_OFFSET 0xffb4
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#define DIR825B1_CAL_LOCATION_0 0x1f660000
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#define DIR825B1_CAL_LOCATION_1 0x1f7f0000
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static struct gpio_led dir825b1_leds_gpio[] __initdata = {
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{
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.name = "d-link:blue:usb",
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.gpio = DIR825B1_GPIO_LED_BLUE_USB,
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.active_low = 1,
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}, {
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.name = "d-link:orange:power",
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.gpio = DIR825B1_GPIO_LED_ORANGE_POWER,
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.active_low = 1,
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}, {
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.name = "d-link:blue:power",
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.gpio = DIR825B1_GPIO_LED_BLUE_POWER,
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.active_low = 1,
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}, {
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.name = "d-link:blue:wps",
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.gpio = DIR825B1_GPIO_LED_BLUE_WPS,
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.active_low = 1,
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}, {
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.name = "d-link:orange:planet",
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.gpio = DIR825B1_GPIO_LED_ORANGE_PLANET,
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.active_low = 1,
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}, {
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.name = "d-link:blue:planet",
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.gpio = DIR825B1_GPIO_LED_BLUE_PLANET,
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.active_low = 1,
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}
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};
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static struct gpio_keys_button dir825b1_gpio_keys[] __initdata = {
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{
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.desc = "reset",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL,
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.gpio = DIR825B1_GPIO_BTN_RESET,
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.active_low = 1,
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}, {
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.desc = "wps",
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.type = EV_KEY,
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.code = KEY_WPS_BUTTON,
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.debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL,
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.gpio = DIR825B1_GPIO_BTN_WPS,
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.active_low = 1,
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}
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};
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static struct rtl8366_initval dir825b1_rtl8366s_initvals[] = {
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{ .reg = 0x06, .val = 0x0108 },
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};
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static struct rtl8366_platform_data dir825b1_rtl8366s_data = {
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.gpio_sda = DIR825B1_GPIO_RTL8366_SDA,
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.gpio_sck = DIR825B1_GPIO_RTL8366_SCK,
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.num_initvals = ARRAY_SIZE(dir825b1_rtl8366s_initvals),
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.initvals = dir825b1_rtl8366s_initvals,
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};
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static struct platform_device dir825b1_rtl8366s_device = {
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.name = RTL8366S_DRIVER_NAME,
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.id = -1,
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.dev = {
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.platform_data = &dir825b1_rtl8366s_data,
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}
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};
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static void dir825b1_read_ascii_mac(u8 *dest, u8 *src)
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{
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int ret;
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ret = sscanf(src, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
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&dest[0], &dest[1], &dest[2],
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&dest[3], &dest[4], &dest[5]);
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if (ret != ETH_ALEN)
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memset(dest, 0, ETH_ALEN);
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}
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static bool __init dir825b1_is_caldata_valid(u8 *p)
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{
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u16 *magic0, *magic1;
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magic0 = (u16 *)(p + DIR825B1_CAL0_OFFSET);
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magic1 = (u16 *)(p + DIR825B1_CAL1_OFFSET);
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return (*magic0 == 0xa55a && *magic1 == 0xa55a);
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}
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static void __init dir825b1_wlan_init(void)
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{
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u8 *caldata;
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u8 mac1[ETH_ALEN], mac2[ETH_ALEN];
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caldata = (u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0);
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if (!dir825b1_is_caldata_valid(caldata)) {
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caldata = (u8 *)KSEG1ADDR(DIR825B1_CAL_LOCATION_1);
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if (!dir825b1_is_caldata_valid(caldata)) {
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pr_err("no calibration data found\n");
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return;
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}
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}
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dir825b1_read_ascii_mac(mac1, caldata + DIR825B1_MAC0_OFFSET);
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dir825b1_read_ascii_mac(mac2, caldata + DIR825B1_MAC1_OFFSET);
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ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 2);
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ath79_init_mac(ath79_eth1_data.mac_addr, mac1, 3);
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ap9x_pci_setup_wmac_led_pin(0, 5);
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ap9x_pci_setup_wmac_led_pin(1, 5);
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ap94_pci_init(caldata + DIR825B1_CAL0_OFFSET, mac1,
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caldata + DIR825B1_CAL1_OFFSET, mac2);
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}
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static void __init dir825b1_setup(void)
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{
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dir825b1_wlan_init();
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ath79_register_mdio(0, 0x0);
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ath79_eth0_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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ath79_eth0_data.speed = SPEED_1000;
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ath79_eth0_data.duplex = DUPLEX_FULL;
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ath79_eth0_pll_data.pll_1000 = 0x11110000;
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ath79_eth1_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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ath79_eth1_data.phy_mask = 0x10;
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ath79_eth1_pll_data.pll_1000 = 0x11110000;
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ath79_register_eth(0);
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ath79_register_eth(1);
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ath79_register_m25p80(NULL);
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ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825b1_leds_gpio),
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dir825b1_leds_gpio);
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ath79_register_gpio_keys_polled(-1, DIR825B1_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(dir825b1_gpio_keys),
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dir825b1_gpio_keys);
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ath79_register_usb();
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platform_device_register(&dir825b1_rtl8366s_device);
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}
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MIPS_MACHINE(ATH79_MACH_DIR_825_B1, "DIR-825-B1", "D-Link DIR-825 rev. B1",
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dir825b1_setup);
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