mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-26 13:49:52 +02:00
f0589f7290
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@24181 3c298f89-4303-0410-b956-a3cf2f4a3e73
241 lines
6.6 KiB
Diff
241 lines
6.6 KiB
Diff
--- a/arch/mips/ar7/platform.c
|
|
+++ b/arch/mips/ar7/platform.c
|
|
@@ -46,7 +46,6 @@ struct plat_vlynq_data {
|
|
int reset_bit;
|
|
};
|
|
|
|
-
|
|
static int vlynq_on(struct vlynq_device *dev)
|
|
{
|
|
int result;
|
|
@@ -72,7 +71,8 @@ static int vlynq_on(struct vlynq_device
|
|
|
|
msleep(50);
|
|
|
|
- gpio_set_value(pdata->gpio_bit, 1);
|
|
+ gpio_set_value(pdata->gpio_bit,
|
|
+ __vlynq_rev_reg(dev->local) < 0x00010205);
|
|
msleep(50);
|
|
|
|
return 0;
|
|
@@ -601,6 +601,18 @@ static inline unsigned char char2hex(cha
|
|
}
|
|
}
|
|
|
|
+static void auto_mdix_on(void)
|
|
+{
|
|
+ ar7_gpio_enable(28);
|
|
+ ar7_gpio_disable(30);
|
|
+}
|
|
+
|
|
+/*static void auto_mdix_off(void)
|
|
+{
|
|
+ ar7_gpio_disable(28);
|
|
+ ar7_gpio_disable(30);
|
|
+}*/
|
|
+
|
|
static void cpmac_get_mac(int instance, unsigned char *dev_addr)
|
|
{
|
|
int i;
|
|
@@ -662,6 +674,7 @@ static int __init ar7_register_devices(v
|
|
u16 chip_id;
|
|
int res;
|
|
u32 *bootcr, val;
|
|
+ void __iomem *mii_reg;
|
|
#ifdef CONFIG_SERIAL_8250
|
|
static struct uart_port uart_port[2];
|
|
|
|
@@ -715,27 +728,6 @@ static int __init ar7_register_devices(v
|
|
return res;
|
|
}
|
|
|
|
- if (ar7_has_high_cpmac()) {
|
|
- res = fixed_phy_add(PHY_POLL, ar7_is_titan() ? cpmac_high_titan.id : cpmac_high.id,
|
|
- &fixed_phy_status);
|
|
- if (res && res != -ENODEV)
|
|
- return res;
|
|
-
|
|
- cpmac_get_mac(1, ar7_is_titan() ? cpmac_high_data_titan.dev_addr :
|
|
- cpmac_high_data.dev_addr);
|
|
- res = platform_device_register(ar7_is_titan() ? &cpmac_high_titan :
|
|
- &cpmac_high);
|
|
-
|
|
- if (res)
|
|
- return res;
|
|
- } else {
|
|
- if (ar7_is_titan())
|
|
- cpmac_low_data_titan.phy_mask = 0xffffffff;
|
|
- else
|
|
- cpmac_low_data.phy_mask = 0xffffffff;
|
|
-
|
|
- }
|
|
-
|
|
res = fixed_phy_add(PHY_POLL, ar7_is_titan() ? cpmac_low_titan.id :
|
|
cpmac_low.id, &fixed_phy_status);
|
|
if (res && res != -ENODEV)
|
|
@@ -748,6 +740,34 @@ static int __init ar7_register_devices(v
|
|
if (res)
|
|
return res;
|
|
|
|
+ if (ar7_has_high_cpmac()) {
|
|
+ res = fixed_phy_add(PHY_POLL, ar7_is_titan() ?
|
|
+ cpmac_high_titan.id : cpmac_high.id,
|
|
+ &fixed_phy_status);
|
|
+ if (res && res != -ENODEV)
|
|
+ return res;
|
|
+
|
|
+ cpmac_get_mac(1, ar7_is_titan() ?
|
|
+ cpmac_high_data_titan.dev_addr :
|
|
+ cpmac_high_data.dev_addr);
|
|
+ res = platform_device_register(ar7_is_titan() ?
|
|
+ &cpmac_high_titan : &cpmac_high);
|
|
+
|
|
+ if (res)
|
|
+ return res;
|
|
+ } else {
|
|
+ mii_reg = ioremap(AR7_REGS_MII, 4);
|
|
+ if (mii_reg) {
|
|
+ writel(readl(mii_reg) | 1, mii_reg);
|
|
+ iounmap(mii_reg);
|
|
+ }
|
|
+
|
|
+ ar7_gpio_disable(17);
|
|
+ mdelay(20);
|
|
+ ar7_gpio_enable(17);
|
|
+ auto_mdix_on();
|
|
+ }
|
|
+
|
|
detect_leds();
|
|
res = platform_device_register(&ar7_gpio_leds);
|
|
if (res)
|
|
@@ -771,8 +791,10 @@ static int __init ar7_register_devices(v
|
|
ar7_wdt_res.end = ar7_wdt_res.start + 0x20;
|
|
|
|
bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4);
|
|
- val = *bootcr;
|
|
- iounmap(bootcr);
|
|
+ if (bootcr) {
|
|
+ val = *bootcr;
|
|
+ iounmap(bootcr);
|
|
+ }
|
|
|
|
/* Register watchdog only if enabled in hardware */
|
|
if (val & AR7_WDT_HW_ENA)
|
|
--- a/arch/mips/include/asm/mach-ar7/ar7.h
|
|
+++ b/arch/mips/include/asm/mach-ar7/ar7.h
|
|
@@ -41,6 +41,7 @@
|
|
#define AR7_REGS_RESET (AR7_REGS_BASE + 0x1600)
|
|
#define AR7_REGS_VLYNQ0 (AR7_REGS_BASE + 0x1800)
|
|
#define AR7_REGS_DCL (AR7_REGS_BASE + 0x1a00)
|
|
+#define AR7_REGS_MII (AR7_REGS_BASE + 0x1a08)
|
|
#define AR7_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1c00)
|
|
#define AR7_REGS_MDIO (AR7_REGS_BASE + 0x1e00)
|
|
#define AR7_REGS_IRQ (AR7_REGS_BASE + 0x2400)
|
|
--- a/drivers/net/cpmac.c
|
|
+++ b/drivers/net/cpmac.c
|
|
@@ -668,9 +668,8 @@ static void cpmac_hw_start(struct net_de
|
|
for (i = 0; i < 8; i++)
|
|
cpmac_write(priv->regs, CPMAC_MAC_ADDR_LO(i), dev->dev_addr[5]);
|
|
cpmac_write(priv->regs, CPMAC_MAC_ADDR_MID, dev->dev_addr[4]);
|
|
- cpmac_write(priv->regs, CPMAC_MAC_ADDR_HI, dev->dev_addr[0] |
|
|
- (dev->dev_addr[1] << 8) | (dev->dev_addr[2] << 16) |
|
|
- (dev->dev_addr[3] << 24));
|
|
+ cpmac_write(priv->regs, CPMAC_MAC_ADDR_HI, be32_to_cpu(*(u32 *)
|
|
+ dev->dev_addr));
|
|
cpmac_write(priv->regs, CPMAC_MAX_LENGTH, CPMAC_SKB_SIZE);
|
|
cpmac_write(priv->regs, CPMAC_UNICAST_CLEAR, 0xff);
|
|
cpmac_write(priv->regs, CPMAC_RX_INT_CLEAR, 0xff);
|
|
@@ -1104,8 +1103,6 @@ static const struct net_device_ops cpmac
|
|
.ndo_set_mac_address = eth_mac_addr,
|
|
};
|
|
|
|
-static int external_switch;
|
|
-
|
|
static int __devinit cpmac_probe(struct platform_device *pdev)
|
|
{
|
|
int rc, phy_id;
|
|
@@ -1117,24 +1114,26 @@ static int __devinit cpmac_probe(struct
|
|
|
|
pdata = pdev->dev.platform_data;
|
|
|
|
- if (external_switch || dumb_switch) {
|
|
- strncpy(mdio_bus_id, "0", MII_BUS_ID_SIZE); /* fixed phys bus */
|
|
- phy_id = pdev->id;
|
|
- } else {
|
|
- for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
|
|
- if (!(pdata->phy_mask & (1 << phy_id)))
|
|
- continue;
|
|
- if (!cpmac_mii->phy_map[phy_id])
|
|
- continue;
|
|
- strncpy(mdio_bus_id, cpmac_mii->id, MII_BUS_ID_SIZE);
|
|
- break;
|
|
- }
|
|
+ if (dumb_switch)
|
|
+ phy_id = PHY_MAX_ADDR;
|
|
+ else for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
|
|
+ if (!((pdata->phy_mask | cpmac_mii->phy_mask) &
|
|
+ (1 << phy_id)))
|
|
+ continue;
|
|
+ if (cpmac_mii->phy_map[phy_id])
|
|
+ continue;
|
|
+ strncpy(mdio_bus_id, cpmac_mii->id, MII_BUS_ID_SIZE);
|
|
+ break;
|
|
}
|
|
|
|
if (phy_id == PHY_MAX_ADDR) {
|
|
dev_err(&pdev->dev, "no PHY present, falling back to switch mode\n");
|
|
strncpy(mdio_bus_id, "0", MII_BUS_ID_SIZE); /* fixed phys bus */
|
|
phy_id = pdev->id;
|
|
+ } else {
|
|
+ /* Now disable EPHY and enable MII */
|
|
+ dev_info(&pdev->dev, "trying external MII\n");
|
|
+ ar7_device_disable(AR7_RESET_BIT_EPHY);
|
|
}
|
|
|
|
dev = alloc_etherdev_mq(sizeof(*priv), CPMAC_QUEUES);
|
|
@@ -1168,7 +1167,7 @@ static int __devinit cpmac_probe(struct
|
|
priv->dev = dev;
|
|
priv->ring_size = 64;
|
|
priv->msg_enable = netif_msg_init(debug_level, 0xff);
|
|
- memcpy(dev->dev_addr, pdata->dev_addr, sizeof(dev->dev_addr));
|
|
+ memcpy(dev->dev_addr, pdata->dev_addr, sizeof(pdata->dev_addr));
|
|
|
|
snprintf(priv->phy_name, MII_BUS_ID_SIZE, PHY_ID_FMT, mdio_bus_id, phy_id);
|
|
|
|
@@ -1244,14 +1243,14 @@ int __devinit cpmac_init(void)
|
|
ar7_gpio_disable(26);
|
|
ar7_gpio_disable(27);
|
|
|
|
- if (!ar7_is_titan()) {
|
|
+ if (ar7_is_titan()) {
|
|
+ ar7_device_reset(AR7_RESET_BIT_EPHY);
|
|
+ ar7_device_reset(TITAN_RESET_BIT_EPHY1);
|
|
+ } else {
|
|
ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
|
|
ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
|
|
- }
|
|
- ar7_device_reset(AR7_RESET_BIT_EPHY);
|
|
|
|
- if (ar7_is_titan()) {
|
|
- ar7_device_reset(TITAN_RESET_BIT_EPHY1);
|
|
+ ar7_device_reset(AR7_RESET_BIT_EPHY);
|
|
}
|
|
|
|
cpmac_mii->reset(cpmac_mii);
|
|
@@ -1262,14 +1261,7 @@ int __devinit cpmac_init(void)
|
|
else
|
|
msleep(10);
|
|
|
|
- mask &= 0x7fffffff;
|
|
- if (mask & (mask - 1)) {
|
|
- external_switch = 1;
|
|
- mask = 0;
|
|
- }
|
|
-
|
|
- cpmac_mii->phy_mask = ar7_is_titan()? ~(mask | 0x80000000 | 0x40000000):
|
|
- ~(mask | 0x80000000);
|
|
+ cpmac_mii->phy_mask = ~mask;
|
|
snprintf(cpmac_mii->id, MII_BUS_ID_SIZE, "1");
|
|
|
|
res = mdiobus_register(cpmac_mii);
|