mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-27 07:24:35 +02:00
17c7b6c3fd
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@8653 3c298f89-4303-0410-b956-a3cf2f4a3e73
877 lines
23 KiB
C
877 lines
23 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
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*/
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//-----------------------------------------------------------------------
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/*
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* Description:
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* Driver for Infineon Amazon 3 port switch
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*/
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//-----------------------------------------------------------------------
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/* Author: Wu Qi Ming[Qi-Ming.Wu@infineon.com]
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* Created: 7-April-2004
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*/
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//-----------------------------------------------------------------------
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/* History
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* Changed on: Jun 28, 2004
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* Changed by: peng.liu@infineon.com
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* Reason: add hardware flow control (HFC) (CONFIG_NET_HW_FLOWCONTROL)
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*
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* Changed on: Apr 6, 2005
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* Changed by: mars.lin@infineon.com
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* Reason : supoort port identification
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*/
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// copyright 2004-2005 infineon.com
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// copyright 2007 john crispin <blogic@openwrt.org>
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// copyright 2007 felix fietkau <nbd@openwrt.org>
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// TODO
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// port vlan code from bcrm target... the tawainese code was scrapped due to crappyness
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// check all the mmi reg settings and possibly document them better
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// verify the ethtool code
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// remove the while(1) stuff
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// further clean up and rework ... but it works for now
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// check the mode[]=bridge stuff
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// verify that the ethaddr can be set from u-boot
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#ifndef __KERNEL__
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#define __KERNEL__
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#endif
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#if defined(CONFIG_MODVERSIONS) && !defined(MODVERSIONS)
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#define MODVERSIONS
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#endif
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#if defined(MODVERSIONS) && !defined(__GENKSYMS__)
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#include <linux/modversions.h>
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#endif
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#include <linux/module.h>
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#include <linux/string.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/errno.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/mii.h>
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#include <asm/uaccess.h>
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#include <linux/in.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/ip.h>
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#include <linux/tcp.h>
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#include <linux/skbuff.h>
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#include <linux/in6.h>
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#include <linux/proc_fs.h>
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#include <linux/mm.h>
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#include <linux/ethtool.h>
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#include <asm/checksum.h>
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#include <linux/init.h>
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#include <asm/amazon/amazon.h>
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#include <asm/amazon/amazon_dma.h>
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#include <asm/amazon/amazon_sw.h>
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// how many mii ports are there ?
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#define AMAZON_SW_INT_NO 2
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#define ETHERNET_PACKET_DMA_BUFFER_SIZE 1536
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/***************************************** Module Parameters *************************************/
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char mode[] = "bridge";
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module_param_array(mode, charp, NULL, 0);
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static int timeout = 1 * HZ;
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module_param(timeout, int, 0);
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int switch_init(struct net_device *dev);
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void switch_tx_timeout(struct net_device *dev);
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struct net_device switch_devs[2] = {
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{init:switch_init,},
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{init:switch_init,}
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};
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int add_mac_table_entry(u64 entry_value)
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{
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int i;
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u32 data1, data2;
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AMAZON_SW_REG32(AMAZON_SW_ARL_CTL) = ~7;
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for (i = 0; i < 32; i++) {
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AMAZON_SW_REG32(AMAZON_SW_CPU_ACTL) = 0x80000000 | 0x20 | i;
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while (AMAZON_SW_REG32(AMAZON_SW_CPU_ACTL) & (0x80000000)) {};
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data1 = AMAZON_SW_REG32(AMAZON_SW_DATA1);
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data2 = AMAZON_SW_REG32(AMAZON_SW_DATA2);
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if ((data1 & (0x00700000)) != 0x00700000)
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continue;
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AMAZON_SW_REG32(AMAZON_SW_DATA1) = (u32) (entry_value >> 32);
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AMAZON_SW_REG32(AMAZON_SW_DATA2) = (u32) entry_value & 0xffffffff;
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AMAZON_SW_REG32(AMAZON_SW_CPU_ACTL) = 0xc0000020 | i;
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while (AMAZON_SW_REG32(AMAZON_SW_CPU_ACTL) & (0x80000000)) {};
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break;
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}
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AMAZON_SW_REG32(AMAZON_SW_ARL_CTL) |= 7;
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if (i >= 32)
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return -1;
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return OK;
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}
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u64 read_mac_table_entry(int index)
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{
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u32 data1, data2;
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u64 value;
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AMAZON_SW_REG32(AMAZON_SW_CPU_ACTL) = 0x80000000 | 0x20 | index;
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while (AMAZON_SW_REG32(AMAZON_SW_CPU_ACTL) & (0x80000000)) {};
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data1 = AMAZON_SW_REG32(AMAZON_SW_DATA1) & 0xffffff;
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data2 = AMAZON_SW_REG32(AMAZON_SW_DATA2);
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value = (u64) data1 << 32 | (u64) data2;
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return value;
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}
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int write_mac_table_entry(int index, u64 value)
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{
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u32 data1, data2;
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data1 = (u32) (value >> 32);
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data2 = (u32) value & 0xffffffff;
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AMAZON_SW_REG32(AMAZON_SW_DATA1) = data1;
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AMAZON_SW_REG32(AMAZON_SW_DATA2) = data2;
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AMAZON_SW_REG32(AMAZON_SW_CPU_ACTL) = 0xc0000020 | index;
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while (AMAZON_SW_REG32(AMAZON_SW_CPU_ACTL) & (0x80000000)) {};
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return OK;
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}
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u32 get_mdio_reg(int phy_addr, int reg_num)
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{
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u32 value;
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AMAZON_SW_REG32(AMAZON_SW_MDIO_ACC) = (3 << 30) | ((phy_addr & 0x1f) << 21) | ((reg_num & 0x1f) << 16);
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while (AMAZON_SW_REG32(AMAZON_SW_MDIO_ACC) & (1 << 31)) {};
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value = AMAZON_SW_REG32(AMAZON_SW_MDIO_ACC) & 0xffff;
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return value;
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}
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int set_mdio_reg(int phy_addr, int reg_num, u32 value)
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{
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AMAZON_SW_REG32(AMAZON_SW_MDIO_ACC) = (2 << 30) | ((phy_addr & 0x1f) << 21) | ((reg_num & 0x1f) << 16) | (value & 0xffff);
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while (AMAZON_SW_REG32(AMAZON_SW_MDIO_ACC) & (1 << 31)) {};
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return OK;
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}
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int auto_negotiate(int phy_addr)
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{
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u32 value = 0;
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value = get_mdio_reg(phy_addr, MDIO_BASE_CONTROL_REG);
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set_mdio_reg(phy_addr, MDIO_BASE_CONTROL_REG, (value | RESTART_AUTO_NEGOTIATION | AUTO_NEGOTIATION_ENABLE | PHY_RESET));
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return OK;
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}
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/*
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In this version of switch driver, we split the dma channels for the switch.
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2 for port0 and 2 for port1. So that we can do internal bridging if necessary.
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In switch mode, packets coming in from port0 or port1 is able to do Destination
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address lookup. Packets coming from port0 with destination address of port1 should
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not go to pmac again. The switch hardware should be able to do the switch in the hard
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ware level. Packets coming from the pmac should not do the DA look up in that the
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desination is already known for the kernel. It only needs to go to the correct NIC to
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find its way out.
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*/
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int amazon_sw_chip_init(void)
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{
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u32 tmp1;
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int i = 0;
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/* Aging tick select: 5mins */
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tmp1 = 0xa0;
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if (strcmp(mode, "bridge") == 0) {
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// bridge mode, set militarised mode to 1, no learning!
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tmp1 |= 0xC00;
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} else {
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// enable learning for P0 and P1,
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tmp1 |= 3;
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}
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/* unknown broadcast/multicast/unicast to all ports */
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AMAZON_SW_REG32(AMAZON_SW_UN_DEST) = 0x1ff;
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AMAZON_SW_REG32(AMAZON_SW_ARL_CTL) = tmp1;
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/* OCS:1 set OCS bit, split the two NIC in rx direction EDL:1 (enable DA lookup) */
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#if defined(CONFIG_IFX_NFEXT_AMAZON_SWITCH_PHYPORT) || defined(CONFIG_IFX_NFEXT_AMAZON_SWITCH_PHYPORT_MODULE)
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AMAZON_SW_REG32(AMAZON_SW_P2_PCTL) = 0x700;
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#else
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AMAZON_SW_REG32(AMAZON_SW_P2_PCTL) = 0x401;
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#endif
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/* EPC: 1 split the two NIC in tx direction CRC is generated */
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AMAZON_SW_REG32(AMAZON_SW_P2_CTL) = 0x6;
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// for bi-directional
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AMAZON_SW_REG32(AMAZON_SW_P0_WM) = 0x14141412;
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AMAZON_SW_REG32(AMAZON_SW_P1_WM) = 0x14141412;
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AMAZON_SW_REG32(AMAZON_SW_P2_WM) = 0x28282826;
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AMAZON_SW_REG32(AMAZON_SW_GBL_WM) = 0x0;
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AMAZON_SW_REG32(AMAZON_CGU_PLL0SR) = (AMAZON_SW_REG32(AMAZON_CGU_PLL0SR)) | 0x58000000;
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// clock for PHY
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AMAZON_SW_REG32(AMAZON_CGU_IFCCR) = (AMAZON_SW_REG32(AMAZON_CGU_IFCCR)) | 0x80000004;
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// enable power for PHY
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AMAZON_SW_REG32(AMAZON_PMU_PWDCR) = (AMAZON_SW_REG32(AMAZON_PMU_PWDCR)) | AMAZON_PMU_PWDCR_EPHY;
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// set reverse MII, enable MDIO statemachine
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AMAZON_SW_REG32(AMAZON_SW_MDIO_CFG) = 0x800027bf;
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while (1)
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if (((AMAZON_SW_REG32(AMAZON_SW_MDIO_CFG)) & 0x80000000) == 0)
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break;
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AMAZON_SW_REG32(AMAZON_SW_EPHY) = 0xff;
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// auto negotiation
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AMAZON_SW_REG32(AMAZON_SW_MDIO_ACC) = 0x83e08000;
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auto_negotiate(0x1f);
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/* enable all ports */
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AMAZON_SW_REG32(AMAZON_SW_PS_CTL) = 0x7;
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for (i = 0; i < 32; i++)
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write_mac_table_entry(i, 1 << 50);
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return 0;
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}
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static unsigned char my_ethaddr[MAX_ADDR_LEN];
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/* need to get the ether addr from u-boot */
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static int __init ethaddr_setup(char *line)
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{
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char *ep;
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int i;
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memset(my_ethaddr, 0, MAX_ADDR_LEN);
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for (i = 0; i < 6; i++) {
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my_ethaddr[i] = line ? simple_strtoul(line, &ep, 16) : 0;
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if (line)
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line = (*ep) ? ep + 1 : ep;
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}
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printk("mac address %2x-%2x-%2x-%2x-%2x-%2x \n", my_ethaddr[0], my_ethaddr[1], my_ethaddr[2], my_ethaddr[3], my_ethaddr[4], my_ethaddr[5]);
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return 0;
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}
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__setup("ethaddr=", ethaddr_setup);
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static void open_rx_dma(struct net_device *dev)
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{
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struct switch_priv *priv = (struct switch_priv *) dev->priv;
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struct dma_device_info *dma_dev = priv->dma_device;
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int i;
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for (i = 0; i < dma_dev->num_rx_chan; i++)
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dma_dev->rx_chan[i].control = 1;
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dma_device_update_rx(dma_dev);
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}
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#ifdef CONFIG_NET_HW_FLOWCONTROL
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static void close_rx_dma(struct net_device *dev)
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{
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struct switch_priv *priv = (struct switch_priv *) dev->priv;
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struct dma_device_info *dma_dev = priv->dma_device;
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int i;
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for (i = 0; i < dma_dev->num_rx_chan; i++)
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dma_dev->rx_chan[i].control = 0;
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dma_device_update_rx(dma_dev);
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}
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void amazon_xon(struct net_device *dev)
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{
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unsigned long flag;
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local_irq_save(flag);
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open_rx_dma(dev);
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local_irq_restore(flag);
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}
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#endif
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int switch_open(struct net_device *dev)
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{
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struct switch_priv *priv = (struct switch_priv *) dev->priv;
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if (!strcmp(dev->name, "eth1")) {
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priv->mdio_phy_addr = PHY0_ADDR;
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}
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open_rx_dma(dev);
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#ifdef CONFIG_NET_HW_FLOWCONTROL
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if ((priv->fc_bit = netdev_register_fc(dev, amazon_xon)) == 0) {
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printk("Hardware Flow Control register fails\n");
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}
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#endif
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netif_start_queue(dev);
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return OK;
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}
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int switch_release(struct net_device *dev)
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{
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int i;
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struct switch_priv *priv = (struct switch_priv *) dev->priv;
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struct dma_device_info *dma_dev = priv->dma_device;
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for (i = 0; i < dma_dev->num_tx_chan; i++)
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dma_dev->tx_chan[i].control = 0;
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for (i = 0; i < dma_dev->num_rx_chan; i++)
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dma_dev->rx_chan[i].control = 0;
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dma_device_update(dma_dev);
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#ifdef CONFIG_NET_HW_FLOWCONTROL
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if (priv->fc_bit) {
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netdev_unregister_fc(priv->fc_bit);
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}
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#endif
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netif_stop_queue(dev);
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return OK;
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}
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void switch_rx(struct net_device *dev, int len, struct sk_buff *skb)
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{
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struct switch_priv *priv = (struct switch_priv *) dev->priv;
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#ifdef CONFIG_NET_HW_FLOWCONTROL
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int mit_sel = 0;
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#endif
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skb->dev = dev;
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skb->protocol = eth_type_trans(skb, dev);
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#ifdef CONFIG_NET_HW_FLOWCONTROL
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mit_sel = netif_rx(skb);
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switch (mit_sel) {
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case NET_RX_SUCCESS:
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case NET_RX_CN_LOW:
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case NET_RX_CN_MOD:
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break;
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case NET_RX_CN_HIGH:
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break;
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case NET_RX_DROP:
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if ((priv->fc_bit)
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&& (!test_and_set_bit(priv->fc_bit, &netdev_fc_xoff))) {
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close_rx_dma(dev);
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}
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break;
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}
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#else
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netif_rx(skb);
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#endif
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priv->stats.rx_packets++;
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priv->stats.rx_bytes += len;
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return;
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}
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int asmlinkage switch_hw_tx(char *buf, int len, struct net_device *dev)
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{
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struct switch_priv *priv = dev->priv;
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struct dma_device_info *dma_dev = priv->dma_device;
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dma_dev->current_tx_chan = 0;
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return dma_device_write(dma_dev, buf, len, priv->skb);
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}
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int asmlinkage switch_tx(struct sk_buff *skb, struct net_device *dev)
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{
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int len;
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char *data;
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struct switch_priv *priv = (struct switch_priv *) dev->priv;
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len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
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data = skb->data;
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priv->skb = skb;
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dev->trans_start = jiffies;
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if (switch_hw_tx(data, len, dev) != len) {
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dev_kfree_skb_any(skb);
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return OK;
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}
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priv->stats.tx_packets++;
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priv->stats.tx_bytes += len;
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return OK;
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}
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void switch_tx_timeout(struct net_device *dev)
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{
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struct switch_priv *priv = (struct switch_priv *) dev->priv;
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priv->stats.tx_errors++;
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netif_wake_queue(dev);
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return;
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}
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void negotiate(struct net_device *dev)
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{
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struct switch_priv *priv = (struct switch_priv *) dev->priv;
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unsigned short data = get_mdio_reg(priv->mdio_phy_addr, MDIO_ADVERTISMENT_REG);
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data &= ~(MDIO_ADVERT_100_HD | MDIO_ADVERT_100_FD | MDIO_ADVERT_10_FD | MDIO_ADVERT_10_HD);
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switch (priv->current_speed_selection) {
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case 10:
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if (priv->current_duplex == full)
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data |= MDIO_ADVERT_10_FD;
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else if (priv->current_duplex == half)
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data |= MDIO_ADVERT_10_HD;
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else
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data |= MDIO_ADVERT_10_HD | MDIO_ADVERT_10_FD;
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break;
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case 100:
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if (priv->current_duplex == full)
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data |= MDIO_ADVERT_100_FD;
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else if (priv->current_duplex == half)
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data |= MDIO_ADVERT_100_HD;
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else
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data |= MDIO_ADVERT_100_HD | MDIO_ADVERT_100_FD;
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break;
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case 0: /* Auto */
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if (priv->current_duplex == full)
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data |= MDIO_ADVERT_100_FD | MDIO_ADVERT_10_FD;
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else if (priv->current_duplex == half)
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data |= MDIO_ADVERT_100_HD | MDIO_ADVERT_10_HD;
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else
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data |= MDIO_ADVERT_100_HD | MDIO_ADVERT_100_FD | MDIO_ADVERT_10_FD | MDIO_ADVERT_10_HD;
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break;
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default: /* assume autoneg speed and duplex */
|
|
data |= MDIO_ADVERT_100_HD | MDIO_ADVERT_100_FD | MDIO_ADVERT_10_FD | MDIO_ADVERT_10_HD;
|
|
}
|
|
|
|
set_mdio_reg(priv->mdio_phy_addr, MDIO_ADVERTISMENT_REG, data);
|
|
|
|
/* Renegotiate with link partner */
|
|
|
|
data = get_mdio_reg(priv->mdio_phy_addr, MDIO_BASE_CONTROL_REG);
|
|
data |= MDIO_BC_NEGOTIATE;
|
|
|
|
set_mdio_reg(priv->mdio_phy_addr, MDIO_BASE_CONTROL_REG, data);
|
|
|
|
}
|
|
|
|
|
|
void set_duplex(struct net_device *dev, enum duplex new_duplex)
|
|
{
|
|
struct switch_priv *priv = (struct switch_priv *) dev->priv;
|
|
if (new_duplex != priv->current_duplex) {
|
|
priv->current_duplex = new_duplex;
|
|
negotiate(dev);
|
|
}
|
|
}
|
|
|
|
void set_speed(struct net_device *dev, unsigned long speed)
|
|
{
|
|
struct switch_priv *priv = (struct switch_priv *) dev->priv;
|
|
priv->current_speed_selection = speed;
|
|
negotiate(dev);
|
|
}
|
|
|
|
static int switch_ethtool_ioctl(struct net_device *dev, struct ifreq *ifr)
|
|
{
|
|
struct switch_priv *priv = (struct switch_priv *) dev->priv;
|
|
struct ethtool_cmd ecmd;
|
|
|
|
if (copy_from_user(&ecmd, ifr->ifr_data, sizeof(ecmd)))
|
|
return -EFAULT;
|
|
|
|
switch (ecmd.cmd) {
|
|
case ETHTOOL_GSET:
|
|
memset((void *) &ecmd, 0, sizeof(ecmd));
|
|
ecmd.supported = SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
|
|
SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full;
|
|
ecmd.port = PORT_TP;
|
|
ecmd.transceiver = XCVR_EXTERNAL;
|
|
ecmd.phy_address = priv->mdio_phy_addr;
|
|
|
|
ecmd.speed = priv->current_speed;
|
|
|
|
ecmd.duplex = priv->full_duplex ? DUPLEX_FULL : DUPLEX_HALF;
|
|
|
|
ecmd.advertising = ADVERTISED_TP;
|
|
if (priv->current_duplex == autoneg && priv->current_speed_selection == 0)
|
|
ecmd.advertising |= ADVERTISED_Autoneg;
|
|
else {
|
|
ecmd.advertising |= ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |
|
|
ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full;
|
|
if (priv->current_speed_selection == 10)
|
|
ecmd.advertising &= ~(ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full);
|
|
else if (priv->current_speed_selection == 100)
|
|
ecmd.advertising &= ~(ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full);
|
|
if (priv->current_duplex == half)
|
|
ecmd.advertising &= ~(ADVERTISED_10baseT_Full | ADVERTISED_100baseT_Full);
|
|
else if (priv->current_duplex == full)
|
|
ecmd.advertising &= ~(ADVERTISED_10baseT_Half | ADVERTISED_100baseT_Half);
|
|
}
|
|
ecmd.autoneg = AUTONEG_ENABLE;
|
|
if (copy_to_user(ifr->ifr_data, &ecmd, sizeof(ecmd)))
|
|
return -EFAULT;
|
|
break;
|
|
|
|
case ETHTOOL_SSET:
|
|
if (!capable(CAP_NET_ADMIN)) {
|
|
return -EPERM;
|
|
}
|
|
if (ecmd.autoneg == AUTONEG_ENABLE) {
|
|
set_duplex(dev, autoneg);
|
|
set_speed(dev, 0);
|
|
} else {
|
|
set_duplex(dev, ecmd.duplex == DUPLEX_HALF ? half : full);
|
|
set_speed(dev, ecmd.speed == SPEED_10 ? 10 : 100);
|
|
}
|
|
break;
|
|
|
|
case ETHTOOL_GDRVINFO:
|
|
{
|
|
struct ethtool_drvinfo info;
|
|
memset((void *) &info, 0, sizeof(info));
|
|
strncpy(info.driver, "AMAZONE", sizeof(info.driver) - 1);
|
|
strncpy(info.fw_version, "N/A", sizeof(info.fw_version) - 1);
|
|
strncpy(info.bus_info, "N/A", sizeof(info.bus_info) - 1);
|
|
info.regdump_len = 0;
|
|
info.eedump_len = 0;
|
|
info.testinfo_len = 0;
|
|
if (copy_to_user(ifr->ifr_data, &info, sizeof(info)))
|
|
return -EFAULT;
|
|
}
|
|
break;
|
|
case ETHTOOL_NWAY_RST:
|
|
if (priv->current_duplex == autoneg && priv->current_speed_selection == 0)
|
|
negotiate(dev);
|
|
break;
|
|
default:
|
|
return -EOPNOTSUPP;
|
|
break;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
|
|
|
|
int mac_table_tools_ioctl(struct net_device *dev, struct mac_table_req *req)
|
|
{
|
|
int cmd;
|
|
int i;
|
|
cmd = req->cmd;
|
|
switch (cmd) {
|
|
case RESET_MAC_TABLE:
|
|
for (i = 0; i < 32; i++) {
|
|
write_mac_table_entry(i, 0);
|
|
}
|
|
break;
|
|
case READ_MAC_ENTRY:
|
|
req->entry_value = read_mac_table_entry(req->index);
|
|
break;
|
|
case WRITE_MAC_ENTRY:
|
|
write_mac_table_entry(req->index, req->entry_value);
|
|
break;
|
|
case ADD_MAC_ENTRY:
|
|
add_mac_table_entry(req->entry_value);
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
/*
|
|
the ioctl for the switch driver is developed in the conventional way
|
|
the control type falls into some basic categories, among them, the
|
|
SIOCETHTOOL is the traditional eth interface. VLAN_TOOLS and
|
|
MAC_TABLE_TOOLS are designed specifically for amazon chip. User
|
|
should be aware of the data structures used in these interfaces.
|
|
*/
|
|
int switch_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
|
|
{
|
|
struct data_req *switch_data_req = (struct data_req *) ifr->ifr_data;
|
|
struct mac_table_req *switch_mac_table_req;
|
|
switch (cmd) {
|
|
case SIOCETHTOOL:
|
|
switch_ethtool_ioctl(dev, ifr);
|
|
break;
|
|
case SIOCGMIIPHY: /* Get PHY address */
|
|
break;
|
|
case SIOCGMIIREG: /* Read MII register */
|
|
break;
|
|
case SIOCSMIIREG: /* Write MII register */
|
|
break;
|
|
case SET_ETH_SPEED_10: /* 10 Mbps */
|
|
break;
|
|
case SET_ETH_SPEED_100: /* 100 Mbps */
|
|
break;
|
|
case SET_ETH_SPEED_AUTO: /* Auto negotiate speed */
|
|
break;
|
|
case SET_ETH_DUPLEX_HALF: /* Half duplex. */
|
|
break;
|
|
case SET_ETH_DUPLEX_FULL: /* Full duplex. */
|
|
break;
|
|
case SET_ETH_DUPLEX_AUTO: /* Autonegotiate duplex */
|
|
break;
|
|
case SET_ETH_REG:
|
|
AMAZON_SW_REG32(switch_data_req->index) = switch_data_req->value;
|
|
break;
|
|
case MAC_TABLE_TOOLS:
|
|
switch_mac_table_req = (struct mac_table_req *) ifr->ifr_data;
|
|
mac_table_tools_ioctl(dev, switch_mac_table_req);
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
struct net_device_stats *switch_stats(struct net_device *dev)
|
|
{
|
|
struct switch_priv *priv = (struct switch_priv *) dev->priv;
|
|
return &priv->stats;
|
|
}
|
|
|
|
int switch_change_mtu(struct net_device *dev, int new_mtu)
|
|
{
|
|
if (new_mtu >= 1516)
|
|
new_mtu = 1516;
|
|
dev->mtu = new_mtu;
|
|
return 0;
|
|
}
|
|
|
|
int switch_hw_receive(struct net_device *dev, struct dma_device_info *dma_dev)
|
|
{
|
|
u8 *buf = NULL;
|
|
int len = 0;
|
|
struct sk_buff *skb = NULL;
|
|
|
|
len = dma_device_read(dma_dev, &buf, (void **) &skb);
|
|
|
|
if (len >= 0x600) {
|
|
printk("packet too large %d\n", len);
|
|
goto switch_hw_receive_err_exit;
|
|
}
|
|
|
|
/* remove CRC */
|
|
len -= 4;
|
|
if (skb == NULL) {
|
|
printk("cannot restore pointer\n");
|
|
goto switch_hw_receive_err_exit;
|
|
}
|
|
if (len > (skb->end - skb->tail)) {
|
|
printk("BUG, len:%d end:%p tail:%p\n", (len + 4), skb->end, skb->tail);
|
|
goto switch_hw_receive_err_exit;
|
|
}
|
|
skb_put(skb, len);
|
|
skb->dev = dev;
|
|
switch_rx(dev, len, skb);
|
|
return OK;
|
|
|
|
switch_hw_receive_err_exit:
|
|
if (skb)
|
|
dev_kfree_skb_any(skb);
|
|
return -EIO;
|
|
}
|
|
|
|
int dma_intr_handler(struct dma_device_info *dma_dev, int status)
|
|
{
|
|
struct net_device *dev;
|
|
|
|
dev = switch_devs + (u32) dma_dev->priv;
|
|
switch (status) {
|
|
case RCV_INT:
|
|
switch_hw_receive(dev, dma_dev);
|
|
break;
|
|
case TX_BUF_FULL_INT:
|
|
netif_stop_queue(dev);
|
|
break;
|
|
case TRANSMIT_CPT_INT:
|
|
netif_wake_queue(dev);
|
|
break;
|
|
}
|
|
return OK;
|
|
}
|
|
|
|
/* reserve 2 bytes in front of data pointer*/
|
|
u8 *dma_buffer_alloc(int len, int *byte_offset, void **opt)
|
|
{
|
|
u8 *buffer = NULL;
|
|
struct sk_buff *skb = NULL;
|
|
skb = dev_alloc_skb(ETHERNET_PACKET_DMA_BUFFER_SIZE);
|
|
if (skb == NULL) {
|
|
return NULL;
|
|
}
|
|
buffer = (u8 *) (skb->data);
|
|
skb_reserve(skb, 2);
|
|
*(int *) opt = (int) skb;
|
|
*byte_offset = 2;
|
|
return buffer;
|
|
}
|
|
|
|
int dma_buffer_free(u8 * dataptr, void *opt)
|
|
{
|
|
struct sk_buff *skb = NULL;
|
|
if (opt == NULL) {
|
|
kfree(dataptr);
|
|
} else {
|
|
skb = (struct sk_buff *) opt;
|
|
dev_kfree_skb_any(skb);
|
|
}
|
|
return OK;
|
|
}
|
|
|
|
int init_dma_device(_dma_device_info * dma_dev)
|
|
{
|
|
int i;
|
|
int num_tx_chan, num_rx_chan;
|
|
if (strcmp(dma_dev->device_name, "switch1") == 0) {
|
|
num_tx_chan = 1;
|
|
num_rx_chan = 2;
|
|
dma_dev->priv = (void *) 0;
|
|
} else {
|
|
num_tx_chan = 1;
|
|
num_rx_chan = 2;
|
|
dma_dev->priv = (void *) 1;
|
|
}
|
|
|
|
dma_dev->weight = 1;
|
|
dma_dev->num_tx_chan = num_tx_chan;
|
|
dma_dev->num_rx_chan = num_rx_chan;
|
|
dma_dev->ack = 1;
|
|
dma_dev->tx_burst_len = 4;
|
|
dma_dev->rx_burst_len = 4;
|
|
for (i = 0; i < dma_dev->num_tx_chan; i++) {
|
|
dma_dev->tx_chan[i].weight = QOS_DEFAULT_WGT;
|
|
dma_dev->tx_chan[i].desc_num = 10;
|
|
dma_dev->tx_chan[i].packet_size = 0;
|
|
dma_dev->tx_chan[i].control = 0;
|
|
}
|
|
for (i = 0; i < num_rx_chan; i++) {
|
|
dma_dev->rx_chan[i].weight = QOS_DEFAULT_WGT;
|
|
dma_dev->rx_chan[i].desc_num = 10;
|
|
dma_dev->rx_chan[i].packet_size = ETHERNET_PACKET_DMA_BUFFER_SIZE;
|
|
dma_dev->rx_chan[i].control = 0;
|
|
}
|
|
dma_dev->intr_handler = dma_intr_handler;
|
|
dma_dev->buffer_alloc = dma_buffer_alloc;
|
|
dma_dev->buffer_free = dma_buffer_free;
|
|
return 0;
|
|
}
|
|
|
|
int switch_set_mac_address(struct net_device *dev, void *p)
|
|
{
|
|
struct sockaddr *addr = p;
|
|
memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
|
|
return OK;
|
|
}
|
|
|
|
|
|
int switch_init(struct net_device *dev)
|
|
{
|
|
u64 retval = 0;
|
|
int i;
|
|
int result;
|
|
struct switch_priv *priv;
|
|
ether_setup(dev); /* assign some of the fields */
|
|
printk("%s up using ", dev->name);
|
|
dev->open = switch_open;
|
|
dev->stop = switch_release;
|
|
dev->hard_start_xmit = switch_tx;
|
|
dev->do_ioctl = switch_ioctl;
|
|
dev->get_stats = switch_stats;
|
|
dev->change_mtu = switch_change_mtu;
|
|
dev->set_mac_address = switch_set_mac_address;
|
|
dev->tx_timeout = switch_tx_timeout;
|
|
dev->watchdog_timeo = timeout;
|
|
|
|
SET_MODULE_OWNER(dev);
|
|
|
|
dev->priv = kmalloc(sizeof(struct switch_priv), GFP_KERNEL);
|
|
if (dev->priv == NULL)
|
|
return -ENOMEM;
|
|
memset(dev->priv, 0, sizeof(struct switch_priv));
|
|
priv = dev->priv;
|
|
priv->dma_device = (struct dma_device_info *) kmalloc(sizeof(struct dma_device_info), GFP_KERNEL);
|
|
if ((dev - switch_devs) == 0) {
|
|
sprintf(priv->dma_device->device_name, "switch1");
|
|
} else if ((dev - switch_devs) == 1) {
|
|
sprintf(priv->dma_device->device_name, "switch2");
|
|
}
|
|
printk("\"%s\"\n", priv->dma_device->device_name);
|
|
init_dma_device(priv->dma_device);
|
|
result = dma_device_register(priv->dma_device);
|
|
|
|
/* read the mac address from the mac table and put them into the mac table. */
|
|
for (i = 0; i < 6; i++) {
|
|
retval += my_ethaddr[i];
|
|
}
|
|
/* ethaddr not set in u-boot ? */
|
|
if (retval == 0) {
|
|
dev->dev_addr[0] = 0x00;
|
|
dev->dev_addr[1] = 0x20;
|
|
dev->dev_addr[2] = 0xda;
|
|
dev->dev_addr[3] = 0x86;
|
|
dev->dev_addr[4] = 0x23;
|
|
dev->dev_addr[5] = 0x74 + (unsigned char) (dev - switch_devs);
|
|
} else {
|
|
for (i = 0; i < 6; i++) {
|
|
dev->dev_addr[i] = my_ethaddr[i];
|
|
}
|
|
dev->dev_addr[5] += +(unsigned char) (dev - switch_devs);
|
|
}
|
|
return OK;
|
|
}
|
|
|
|
int switch_init_module(void)
|
|
{
|
|
int i = 0, result, device_present = 0;
|
|
|
|
for (i = 0; i < AMAZON_SW_INT_NO; i++) {
|
|
sprintf(switch_devs[i].name, "eth%d", i);
|
|
|
|
if ((result = register_netdev(switch_devs + i)))
|
|
printk("error %i registering device \"%s\"\n", result, switch_devs[i].name);
|
|
else
|
|
device_present++;
|
|
}
|
|
amazon_sw_chip_init();
|
|
return device_present ? 0 : -ENODEV;
|
|
}
|
|
|
|
void switch_cleanup(void)
|
|
{
|
|
int i;
|
|
struct switch_priv *priv;
|
|
for (i = 0; i < AMAZON_SW_INT_NO; i++) {
|
|
priv = switch_devs[i].priv;
|
|
if (priv->dma_device) {
|
|
dma_device_unregister(priv->dma_device);
|
|
kfree(priv->dma_device);
|
|
}
|
|
kfree(switch_devs[i].priv);
|
|
unregister_netdev(switch_devs + i);
|
|
}
|
|
return;
|
|
}
|
|
|
|
module_init(switch_init_module);
|
|
module_exit(switch_cleanup);
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_AUTHOR("Wu Qi Ming");
|