juhosg eaa759a8e5 ar71xx: Fix header offset for newer WRT160NL models ... Newer WRT160NLs have a flash chip with 4K erase blocks instead of 64K, resulting in miscalculated partition sizes. Since the actual sizes did not change, hardcode them to their current sizes, and make sure they are at least one erase block big (in case Cisco decides to start to use chips with 128K erase blocks). Signed-off-by: Jonas Gorski <jonas.gorski+openwrt@gmail.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@27049 3c298f89-4303-0410-b956-a3cf2f4a3e73		2011-05-31 22:53:20 +00:00
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maps	ar71xx: fix whitespaces nits	2010-11-12 18:50:29 +00:00
nand	ar71xx: use gpio_*_cansleep calls in the rb4xx NAND driver	2011-01-09 09:29:45 +00:00
wrt160nl_part.c	ar71xx: Fix header offset for newer WRT160NL models	2011-05-31 22:53:20 +00:00