mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-16 14:22:28 +02:00
d668adfbb7
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@17268 3c298f89-4303-0410-b956-a3cf2f4a3e73
136 lines
3.3 KiB
Diff
136 lines
3.3 KiB
Diff
--- a/arch/mips/include/asm/r4kcache.h
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+++ b/arch/mips/include/asm/r4kcache.h
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@@ -20,10 +20,25 @@
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#ifdef CONFIG_BCM47XX
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#include <asm/paccess.h>
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#include <linux/ssb/ssb.h>
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-#define BCM4710_DUMMY_RREG() ((void) *((u8 *) KSEG1ADDR(SSB_ENUM_BASE + SSB_IMSTATE)))
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+#define BCM4710_DUMMY_RREG() bcm4710_dummy_rreg()
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+
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+static inline unsigned long bcm4710_dummy_rreg(void) {
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+ return (*(volatile unsigned long *)(KSEG1ADDR(SSB_ENUM_BASE + SSB_IMSTATE)));
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+}
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+
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+#define BCM4710_FILL_TLB(addr) bcm4710_fill_tlb((void*)(addr))
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+
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+static inline unsigned long bcm4710_fill_tlb(void *addr) {
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+ return (*(unsigned long *)addr);
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+}
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+
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+#define BCM4710_PROTECTED_FILL_TLB(addr) bcm4710_protected_fill_tlb((void*)(addr))
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+
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+static inline void bcm4710_protected_fill_tlb(void *addr) {
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+ unsigned long x;
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+ get_dbe(x, (unsigned long *)addr);;
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+}
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-#define BCM4710_FILL_TLB(addr) (*(volatile unsigned long *)(addr))
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-#define BCM4710_PROTECTED_FILL_TLB(addr) ({ unsigned long x; get_dbe(x, (volatile unsigned long *)(addr)); })
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#else
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#define BCM4710_DUMMY_RREG()
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--- a/arch/mips/mm/tlbex.c
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+++ b/arch/mips/mm/tlbex.c
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@@ -544,6 +544,9 @@ build_get_pgde32(u32 **p, unsigned int t
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#endif
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uasm_i_addu(p, ptr, tmp, ptr);
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#else
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+#ifdef CONFIG_BCM47XX
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+ uasm_i_nop(p);
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+#endif
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UASM_i_LA_mostly(p, ptr, pgdc);
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#endif
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uasm_i_mfc0(p, tmp, C0_BADVADDR); /* get faulting address */
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@@ -674,12 +677,12 @@ static void __cpuinit build_r4000_tlb_re
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/* No need for uasm_i_nop */
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}
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-#ifdef CONFIG_BCM47XX
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- uasm_i_nop(&p);
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-#endif
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#ifdef CONFIG_64BIT
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build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */
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#else
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+# ifdef CONFIG_BCM47XX
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+ uasm_i_nop(&p);
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+# endif
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build_get_pgde32(&p, K0, K1); /* get pgd in K1 */
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#endif
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@@ -687,6 +690,9 @@ static void __cpuinit build_r4000_tlb_re
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build_update_entries(&p, K0, K1);
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build_tlb_write_entry(&p, &l, &r, tlb_random);
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uasm_l_leave(&l, p);
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+#ifdef CONFIG_BCM47XX
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+ uasm_i_nop(&p);
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+#endif
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uasm_i_eret(&p); /* return from trap */
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#ifdef CONFIG_64BIT
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@@ -1084,12 +1090,12 @@ build_r4000_tlbchange_handler_head(u32 *
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struct uasm_reloc **r, unsigned int pte,
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unsigned int ptr)
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{
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-#ifdef CONFIG_BCM47XX
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- uasm_i_nop(p);
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-#endif
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#ifdef CONFIG_64BIT
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build_get_pmde64(p, l, r, pte, ptr); /* get pmd in ptr */
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#else
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+# ifdef CONFIG_BCM47XX
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+ uasm_i_nop(p);
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+# endif
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build_get_pgde32(p, pte, ptr); /* get pgd in ptr */
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#endif
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@@ -1117,6 +1123,9 @@ build_r4000_tlbchange_handler_tail(u32 *
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build_update_entries(p, tmp, ptr);
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build_tlb_write_entry(p, l, r, tlb_indexed);
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uasm_l_leave(l, *p);
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+#ifdef CONFIG_BCM47XX
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+ uasm_i_nop(p);
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+#endif
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uasm_i_eret(p); /* return from trap */
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#ifdef CONFIG_64BIT
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--- a/arch/mips/kernel/genex.S
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+++ b/arch/mips/kernel/genex.S
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@@ -22,6 +22,19 @@
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#include <asm/page.h>
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#include <asm/thread_info.h>
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+#ifdef CONFIG_BCM47XX
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+# ifdef eret
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+# undef eret
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+# endif
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+# define eret \
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+ .set push; \
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+ .set noreorder; \
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+ nop; \
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+ nop; \
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+ eret; \
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+ .set pop;
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+#endif
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+
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#define PANIC_PIC(msg) \
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.set push; \
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.set reorder; \
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@@ -54,7 +67,6 @@ NESTED(except_vec3_generic, 0, sp)
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.set noat
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#ifdef CONFIG_BCM47XX
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nop
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- nop
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#endif
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#if R5432_CP0_INTERRUPT_WAR
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mfc0 k0, CP0_INDEX
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@@ -79,6 +91,9 @@ NESTED(except_vec3_r4000, 0, sp)
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.set push
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.set mips3
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.set noat
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+#ifdef CONFIG_BCM47XX
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+ nop
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+#endif
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mfc0 k1, CP0_CAUSE
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li k0, 31<<2
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andi k1, k1, 0x7c
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