mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-05 15:27:30 +02:00
1495465bb4
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@20400 3c298f89-4303-0410-b956-a3cf2f4a3e73
525 lines
15 KiB
Diff
525 lines
15 KiB
Diff
Index: linux-2.6.30.8/drivers/net/Kconfig
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===================================================================
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--- linux-2.6.30.8.orig/drivers/net/Kconfig 2009-10-19 21:31:30.000000000 +0200
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+++ linux-2.6.30.8/drivers/net/Kconfig 2009-10-19 21:31:32.000000000 +0200
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@@ -353,6 +353,12 @@
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source "drivers/net/arm/Kconfig"
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+config IFXMIPS_MII0
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+ tristate "Infineon IFXMips eth0 driver"
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+ depends on IFXMIPS
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+ help
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+ Support for the MII0 inside the IFXMips SOC
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+
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config AX88796
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tristate "ASIX AX88796 NE2000 clone support"
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depends on ARM || MIPS || SUPERH
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Index: linux-2.6.30.8/drivers/net/Makefile
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===================================================================
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--- linux-2.6.30.8.orig/drivers/net/Makefile 2009-10-19 21:31:30.000000000 +0200
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+++ linux-2.6.30.8/drivers/net/Makefile 2009-10-19 21:31:32.000000000 +0200
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@@ -234,6 +234,7 @@
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obj-$(CONFIG_MLX4_CORE) += mlx4/
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obj-$(CONFIG_ENC28J60) += enc28j60.o
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obj-$(CONFIG_ETHOC) += ethoc.o
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+obj-$(CONFIG_IFXMIPS_MII0) += ifxmips_mii0.o
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obj-$(CONFIG_XTENSA_XT2000_SONIC) += xtsonic.o
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Index: linux-2.6.30.8/drivers/net/ifxmips_mii0.c
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===================================================================
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--- /dev/null 2010-01-25 20:01:36.843225078 +0100
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+++ linux-2.6.30.10/drivers/net/ifxmips_mii0.c 2010-03-13 19:04:25.000000000 +0100
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@@ -0,0 +1,489 @@
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+/*
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
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+ *
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+ * Copyright (C) 2005 Wu Qi Ming <Qi-Ming.Wu@infineon.com>
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+ * Copyright (C) 2008 John Crispin <blogic@openwrt.org>
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/slab.h>
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+#include <linux/errno.h>
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+#include <linux/types.h>
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+#include <linux/interrupt.h>
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+#include <linux/uaccess.h>
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+#include <linux/in.h>
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+#include <linux/netdevice.h>
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+#include <linux/etherdevice.h>
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+#include <linux/phy.h>
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+#include <linux/ip.h>
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+#include <linux/tcp.h>
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+#include <linux/skbuff.h>
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+#include <linux/mm.h>
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+#include <linux/platform_device.h>
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+#include <linux/ethtool.h>
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+#include <linux/init.h>
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+#include <linux/delay.h>
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+
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+#include <asm/checksum.h>
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+
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+#include <ifxmips.h>
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+#include <ifxmips_dma.h>
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+#include <ifxmips_pmu.h>
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+
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+struct ifxmips_mii_priv {
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+ struct net_device_stats stats;
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+ struct dma_device_info *dma_device;
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+ struct sk_buff *skb;
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+
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+ struct mii_bus *mii_bus;
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+ struct phy_device *phydev;
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+ int oldlink, oldspeed, oldduplex;
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+};
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+
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+static struct net_device *ifxmips_mii0_dev;
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+static unsigned char mac_addr[MAX_ADDR_LEN];
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+
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+static int ifxmips_mdiobus_write(struct mii_bus *bus, int phy_addr,
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+ int phy_reg, u16 phy_data)
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+{
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+ u32 val = MDIO_ACC_REQUEST |
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+ ((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) |
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+ ((phy_reg & MDIO_ACC_REG_MASK) << MDIO_ACC_REG_OFFSET) |
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+ phy_data;
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+
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+ while (ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST)
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+ ;
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+ ifxmips_w32(val, IFXMIPS_PPE32_MDIO_ACC);
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+
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+ return 0;
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+}
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+
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+static int ifxmips_mdiobus_read(struct mii_bus *bus, int phy_addr, int phy_reg)
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+{
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+ u32 val = MDIO_ACC_REQUEST | MDIO_ACC_READ |
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+ ((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) |
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+ ((phy_reg & MDIO_ACC_REG_MASK) << MDIO_ACC_REG_OFFSET);
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+
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+ while (ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST)
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+ ;
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+ ifxmips_w32(val, IFXMIPS_PPE32_MDIO_ACC);
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+ while (ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST)
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+ ;
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+ val = ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_VAL_MASK;
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+ return val;
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+}
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+
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+int ifxmips_ifxmips_mii_open(struct net_device *dev)
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+{
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+ struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev);
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+ struct dma_device_info *dma_dev = priv->dma_device;
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+ int i;
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+
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+ for (i = 0; i < dma_dev->max_rx_chan_num; i++) {
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+ if ((dma_dev->rx_chan[i])->control == IFXMIPS_DMA_CH_ON)
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+ (dma_dev->rx_chan[i])->open(dma_dev->rx_chan[i]);
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+ }
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+ netif_start_queue(dev);
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+ return 0;
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+}
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+
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+int ifxmips_mii_release(struct net_device *dev)
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+{
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+ struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev);
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+ struct dma_device_info *dma_dev = priv->dma_device;
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+ int i;
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+
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+ for (i = 0; i < dma_dev->max_rx_chan_num; i++)
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+ dma_dev->rx_chan[i]->close(dma_dev->rx_chan[i]);
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+ netif_stop_queue(dev);
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+ return 0;
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+}
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+
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+int ifxmips_mii_hw_receive(struct net_device *dev, struct dma_device_info *dma_dev)
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+{
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+ struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev);
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+ unsigned char *buf = NULL;
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+ struct sk_buff *skb = NULL;
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+ int len = 0;
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+
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+ len = dma_device_read(dma_dev, &buf, (void **)&skb);
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+
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+ if (len >= ETHERNET_PACKET_DMA_BUFFER_SIZE) {
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+ printk(KERN_INFO "ifxmips_mii0: packet too large %d\n", len);
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+ goto ifxmips_mii_hw_receive_err_exit;
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+ }
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+
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+ /* remove CRC */
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+ len -= 4;
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+ if (skb == NULL) {
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+ printk(KERN_INFO "ifxmips_mii0: cannot restore pointer\n");
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+ goto ifxmips_mii_hw_receive_err_exit;
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+ }
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+
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+ if (len > (skb->end - skb->tail)) {
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+ printk(KERN_INFO "ifxmips_mii0: BUG, len:%d end:%p tail:%p\n",
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+ (len+4), skb->end, skb->tail);
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+ goto ifxmips_mii_hw_receive_err_exit;
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+ }
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+
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+ skb_put(skb, len);
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+ skb->dev = dev;
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+ skb->protocol = eth_type_trans(skb, dev);
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+ netif_rx(skb);
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+
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+ priv->stats.rx_packets++;
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+ priv->stats.rx_bytes += len;
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+ return 0;
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+
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+ifxmips_mii_hw_receive_err_exit:
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+ if (len == 0) {
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+ if (skb)
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+ dev_kfree_skb_any(skb);
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+ priv->stats.rx_errors++;
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+ priv->stats.rx_dropped++;
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+ return -EIO;
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+ } else {
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+ return len;
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+ }
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+}
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+
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+int ifxmips_mii_hw_tx(char *buf, int len, struct net_device *dev)
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+{
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+ int ret = 0;
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+ struct ifxmips_mii_priv *priv = netdev_priv(dev);
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+ struct dma_device_info *dma_dev = priv->dma_device;
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+ ret = dma_device_write(dma_dev, buf, len, priv->skb);
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+ return ret;
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+}
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+
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+int ifxmips_mii_tx(struct sk_buff *skb, struct net_device *dev)
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+{
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+ int len;
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+ char *data;
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+ struct ifxmips_mii_priv *priv = netdev_priv(dev);
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+ struct dma_device_info *dma_dev = priv->dma_device;
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+
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+ len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
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+ data = skb->data;
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+ priv->skb = skb;
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+ dev->trans_start = jiffies;
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+ /* TODO: we got more than 1 dma channel,
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+ so we should do something intelligent here to select one */
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+ dma_dev->current_tx_chan = 0;
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+
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+ wmb();
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+
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+ if (ifxmips_mii_hw_tx(data, len, dev) != len) {
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+ dev_kfree_skb_any(skb);
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+ priv->stats.tx_errors++;
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+ priv->stats.tx_dropped++;
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+ } else {
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+ priv->stats.tx_packets++;
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+ priv->stats.tx_bytes += len;
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+ }
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+
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+ return 0;
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+}
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+
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+void ifxmips_mii_tx_timeout(struct net_device *dev)
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+{
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+ int i;
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+ struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev);
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+
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+ priv->stats.tx_errors++;
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+ for (i = 0; i < priv->dma_device->max_tx_chan_num; i++)
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+ priv->dma_device->tx_chan[i]->disable_irq(priv->dma_device->tx_chan[i]);
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+ netif_wake_queue(dev);
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+ return;
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+}
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+
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+int dma_intr_handler(struct dma_device_info *dma_dev, int status)
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+{
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+ int i;
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+
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+ switch (status) {
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+ case RCV_INT:
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+ ifxmips_mii_hw_receive(ifxmips_mii0_dev, dma_dev);
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+ break;
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+
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+ case TX_BUF_FULL_INT:
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+ printk(KERN_INFO "ifxmips_mii0: tx buffer full\n");
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+ netif_stop_queue(ifxmips_mii0_dev);
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+ for (i = 0; i < dma_dev->max_tx_chan_num; i++) {
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+ if ((dma_dev->tx_chan[i])->control == IFXMIPS_DMA_CH_ON)
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+ dma_dev->tx_chan[i]->enable_irq(dma_dev->tx_chan[i]);
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+ }
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+ break;
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+
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+ case TRANSMIT_CPT_INT:
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+ for (i = 0; i < dma_dev->max_tx_chan_num; i++)
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+ dma_dev->tx_chan[i]->disable_irq(dma_dev->tx_chan[i]);
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+
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+ netif_wake_queue(ifxmips_mii0_dev);
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+ break;
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+ }
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+
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+ return 0;
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+}
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+
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+unsigned char *ifxmips_etop_dma_buffer_alloc(int len, int *byte_offset, void **opt)
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+{
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+ unsigned char *buffer = NULL;
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+ struct sk_buff *skb = NULL;
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+
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+ skb = dev_alloc_skb(ETHERNET_PACKET_DMA_BUFFER_SIZE);
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+ if (skb == NULL)
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+ return NULL;
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+
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+ buffer = (unsigned char *)(skb->data);
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+ skb_reserve(skb, 2);
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+ *(int *)opt = (int)skb;
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+ *byte_offset = 2;
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+
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+ return buffer;
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+}
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+
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+void ifxmips_etop_dma_buffer_free(unsigned char *dataptr, void *opt)
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+{
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+ struct sk_buff *skb = NULL;
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+
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+ if (opt == NULL) {
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+ kfree(dataptr);
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+ } else {
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+ skb = (struct sk_buff *)opt;
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+ dev_kfree_skb_any(skb);
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+ }
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+}
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+
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+static struct net_device_stats *ifxmips_get_stats(struct net_device *dev)
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+{
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+ return &((struct ifxmips_mii_priv *)netdev_priv(dev))->stats;
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+}
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+
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+static void
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+ifxmips_adjust_link(struct net_device *dev)
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+{
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+ struct ifxmips_mii_priv *priv = netdev_priv(dev);
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+ struct phy_device *phydev = priv->phydev;
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+ int new_state = 0;
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+
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+ /* Did anything change? */
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+ if (priv->oldlink != phydev->link ||
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+ priv->oldduplex != phydev->duplex ||
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+ priv->oldspeed != phydev->speed) {
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+ /* Yes, so update status and mark as changed */
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+ new_state = 1;
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+ priv->oldduplex = phydev->duplex;
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+ priv->oldspeed = phydev->speed;
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+ priv->oldlink = phydev->link;
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+ }
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+
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+ /* If link status changed, show new status */
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+ if (new_state)
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+ phy_print_status(phydev);
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+}
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+
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+static int mii_probe(struct net_device *dev)
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+{
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+ struct ifxmips_mii_priv *priv = netdev_priv(dev);
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+ struct phy_device *phydev = NULL;
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+ int phy_addr;
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+
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+ priv->oldlink = 0;
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+ priv->oldspeed = 0;
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+ priv->oldduplex = -1;
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+
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+ /* find the first (lowest address) PHY on the current MAC's MII bus */
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+ for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
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+ if (priv->mii_bus->phy_map[phy_addr]) {
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+ phydev = priv->mii_bus->phy_map[phy_addr];
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+ break; /* break out with first one found */
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+ }
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+ }
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+
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+ if (!phydev) {
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+ printk (KERN_ERR "%s: no PHY found\n", dev->name);
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+ return -ENODEV;
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+ }
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+
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+ /* now we are supposed to have a proper phydev, to attach to... */
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+ BUG_ON(!phydev);
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+ BUG_ON(phydev->attached_dev);
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+
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+ phydev = phy_connect(dev, dev_name(&phydev->dev), &ifxmips_adjust_link,
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+ 0, PHY_INTERFACE_MODE_MII);
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+
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+ if (IS_ERR(phydev)) {
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+ printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
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+ return PTR_ERR(phydev);
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+ }
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+
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+ /* mask with MAC supported features */
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+ phydev->supported &= (SUPPORTED_10baseT_Half
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+ | SUPPORTED_10baseT_Full
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+ | SUPPORTED_100baseT_Half
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+ | SUPPORTED_100baseT_Full
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+ | SUPPORTED_Autoneg
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+ /* | SUPPORTED_Pause | SUPPORTED_Asym_Pause */
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+ | SUPPORTED_MII
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+ | SUPPORTED_TP);
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+
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+ phydev->advertising = phydev->supported;
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+
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+ priv->phydev = phydev;
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+
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+ printk(KERN_INFO "%s: attached PHY driver [%s] "
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+ "(mii_bus:phy_addr=%s, irq=%d)\n",
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+ dev->name, phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
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+
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+ return 0;
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+}
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+
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+
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+static int ifxmips_mii_dev_init(struct net_device *dev)
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+{
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+ int i;
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+ struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev);
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+ ether_setup(dev);
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+ dev->open = ifxmips_ifxmips_mii_open;
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+ dev->stop = ifxmips_mii_release;
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+ dev->hard_start_xmit = ifxmips_mii_tx;
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+ dev->get_stats = ifxmips_get_stats;
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+ dev->tx_timeout = ifxmips_mii_tx_timeout;
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+ dev->watchdog_timeo = 10 * HZ;
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+ memset(priv, 0, sizeof(struct ifxmips_mii_priv));
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+ priv->dma_device = dma_device_reserve("PPE");
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+ if (!priv->dma_device) {
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+ BUG();
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+ return -ENODEV;
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+ }
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+ priv->dma_device->buffer_alloc = &ifxmips_etop_dma_buffer_alloc;
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+ priv->dma_device->buffer_free = &ifxmips_etop_dma_buffer_free;
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+ priv->dma_device->intr_handler = &dma_intr_handler;
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+ priv->dma_device->max_rx_chan_num = 4;
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+
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+ for (i = 0; i < priv->dma_device->max_rx_chan_num; i++) {
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+ priv->dma_device->rx_chan[i]->packet_size = ETHERNET_PACKET_DMA_BUFFER_SIZE;
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+ priv->dma_device->rx_chan[i]->control = IFXMIPS_DMA_CH_ON;
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+ }
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+
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+ for (i = 0; i < priv->dma_device->max_tx_chan_num; i++)
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+ if (i == 0)
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+ priv->dma_device->tx_chan[i]->control = IFXMIPS_DMA_CH_ON;
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+ else
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+ priv->dma_device->tx_chan[i]->control = IFXMIPS_DMA_CH_OFF;
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+
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+ dma_device_register(priv->dma_device);
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+
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+ printk(KERN_INFO "%s: using mac=", dev->name);
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+ for (i = 0; i < 6; i++) {
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+ dev->dev_addr[i] = mac_addr[i];
|
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+ printk("%02X%c", dev->dev_addr[i], (i == 5) ? ('\n') : (':'));
|
|
+ }
|
|
+
|
|
+ priv->mii_bus = mdiobus_alloc();
|
|
+ if (priv->mii_bus == NULL)
|
|
+ return -ENOMEM;
|
|
+
|
|
+ priv->mii_bus->priv = dev;
|
|
+ priv->mii_bus->read = ifxmips_mdiobus_read;
|
|
+ priv->mii_bus->write = ifxmips_mdiobus_write;
|
|
+ priv->mii_bus->name = "ifxmips_mii";
|
|
+ snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%x", 0);
|
|
+ priv->mii_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
|
|
+ for(i = 0; i < PHY_MAX_ADDR; ++i)
|
|
+ priv->mii_bus->irq[i] = PHY_POLL;
|
|
+
|
|
+ mdiobus_register(priv->mii_bus);
|
|
+
|
|
+ return mii_probe(dev);
|
|
+}
|
|
+
|
|
+static void ifxmips_mii_chip_init(int mode)
|
|
+{
|
|
+ ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_DMA);
|
|
+ ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_PPE);
|
|
+
|
|
+ if (mode == REV_MII_MODE)
|
|
+ ifxmips_w32_mask(PPE32_MII_MASK, PPE32_MII_REVERSE, IFXMIPS_PPE32_CFG);
|
|
+ else if (mode == MII_MODE)
|
|
+ ifxmips_w32_mask(PPE32_MII_MASK, PPE32_MII_NORMAL, IFXMIPS_PPE32_CFG);
|
|
+ ifxmips_w32(PPE32_PLEN_UNDER | PPE32_PLEN_OVER, IFXMIPS_PPE32_IG_PLEN_CTRL);
|
|
+ ifxmips_w32(PPE32_CGEN, IFXMIPS_PPE32_ENET_MAC_CFG);
|
|
+ wmb();
|
|
+}
|
|
+
|
|
+static int ifxmips_mii_probe(struct platform_device *dev)
|
|
+{
|
|
+ int result = 0;
|
|
+ unsigned char *mac = (unsigned char *)dev->dev.platform_data;
|
|
+ ifxmips_mii0_dev = alloc_etherdev(sizeof(struct ifxmips_mii_priv));
|
|
+ ifxmips_mii0_dev->init = ifxmips_mii_dev_init;
|
|
+ memcpy(mac_addr, mac, 6);
|
|
+ strcpy(ifxmips_mii0_dev->name, "eth%d");
|
|
+ ifxmips_mii_chip_init(REV_MII_MODE);
|
|
+ result = register_netdev(ifxmips_mii0_dev);
|
|
+ if (result) {
|
|
+ printk(KERN_INFO "ifxmips_mii0: error %i registering device \"%s\"\n", result, ifxmips_mii0_dev->name);
|
|
+ goto out;
|
|
+ }
|
|
+
|
|
+ printk(KERN_INFO "ifxmips_mii0: driver loaded!\n");
|
|
+
|
|
+out:
|
|
+ return result;
|
|
+}
|
|
+
|
|
+static int ifxmips_mii_remove(struct platform_device *dev)
|
|
+{
|
|
+ struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(ifxmips_mii0_dev);
|
|
+
|
|
+ printk(KERN_INFO "ifxmips_mii0: ifxmips_mii0 cleanup\n");
|
|
+
|
|
+ dma_device_unregister(priv->dma_device);
|
|
+ dma_device_release(priv->dma_device);
|
|
+ kfree(priv->dma_device);
|
|
+ unregister_netdev(ifxmips_mii0_dev);
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static struct platform_driver ifxmips_mii_driver = {
|
|
+ .probe = ifxmips_mii_probe,
|
|
+ .remove = ifxmips_mii_remove,
|
|
+ .driver = {
|
|
+ .name = "ifxmips_mii0",
|
|
+ .owner = THIS_MODULE,
|
|
+ },
|
|
+};
|
|
+
|
|
+int __init ifxmips_mii_init(void)
|
|
+{
|
|
+ int ret = platform_driver_register(&ifxmips_mii_driver);
|
|
+ if (ret)
|
|
+ printk(KERN_INFO "ifxmips_mii0: Error registering platfom driver!");
|
|
+ return ret;
|
|
+}
|
|
+
|
|
+static void __exit ifxmips_mii_cleanup(void)
|
|
+{
|
|
+ platform_driver_unregister(&ifxmips_mii_driver);
|
|
+}
|
|
+
|
|
+module_init(ifxmips_mii_init);
|
|
+module_exit(ifxmips_mii_cleanup);
|
|
+
|
|
+MODULE_LICENSE("GPL");
|
|
+MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
|
|
+MODULE_DESCRIPTION("ethernet driver for IFXMIPS boards");
|
|
+
|