mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-13 09:27:30 +02:00
3afb594a0d
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@19092 3c298f89-4303-0410-b956-a3cf2f4a3e73
525 lines
13 KiB
Diff
525 lines
13 KiB
Diff
From fda4bd9bac78efd2f9d566c52956d297bc03e8d9 Mon Sep 17 00:00:00 2001
|
|
From: Anton Vorontsov <avorontsov@ru.mvista.com>
|
|
Date: Sat, 25 Jul 2009 01:42:17 +0400
|
|
Subject: [PATCH] powerpc/83xx: Add support for MPC8377E-WLAN boards
|
|
|
|
MPC8377E-WLAN are basically RDB boards except:
|
|
|
|
- RAM extended to 512 MB;
|
|
- NAND flash removed, NOR flash extended to 64 MB;
|
|
- Vitesse VSC7385 5-port switch removed, RTL8211B PHY added;
|
|
- Power management MCU removed;
|
|
- PCI slot removed, another mini-PCI slot added (IRQ routing changed);
|
|
- USB3300 PHY's ID pin grounded, thus USB port is host-only.
|
|
|
|
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
|
|
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
|
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
|
---
|
|
arch/powerpc/boot/dts/mpc8377_wlan.dts | 464 +++++++++++++++++++++++++++++
|
|
arch/powerpc/platforms/83xx/Kconfig | 4 +-
|
|
arch/powerpc/platforms/83xx/mpc837x_rdb.c | 5 +-
|
|
3 files changed, 469 insertions(+), 4 deletions(-)
|
|
create mode 100644 arch/powerpc/boot/dts/mpc8377_wlan.dts
|
|
|
|
--- /dev/null
|
|
+++ b/arch/powerpc/boot/dts/mpc8377_wlan.dts
|
|
@@ -0,0 +1,464 @@
|
|
+/*
|
|
+ * MPC8377E WLAN Device Tree Source
|
|
+ *
|
|
+ * Copyright 2007-2009 Freescale Semiconductor Inc.
|
|
+ * Copyright 2009 MontaVista Software, Inc.
|
|
+ *
|
|
+ * This program is free software; you can redistribute it and/or modify it
|
|
+ * under the terms of the GNU General Public License as published by the
|
|
+ * Free Software Foundation; either version 2 of the License, or (at your
|
|
+ * option) any later version.
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+
|
|
+/ {
|
|
+ compatible = "fsl,mpc8377wlan";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+
|
|
+ aliases {
|
|
+ ethernet0 = &enet0;
|
|
+ ethernet1 = &enet1;
|
|
+ serial0 = &serial0;
|
|
+ serial1 = &serial1;
|
|
+ pci0 = &pci0;
|
|
+ pci1 = &pci1;
|
|
+ pci2 = &pci2;
|
|
+ };
|
|
+
|
|
+ cpus {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ PowerPC,8377@0 {
|
|
+ device_type = "cpu";
|
|
+ reg = <0x0>;
|
|
+ d-cache-line-size = <32>;
|
|
+ i-cache-line-size = <32>;
|
|
+ d-cache-size = <32768>;
|
|
+ i-cache-size = <32768>;
|
|
+ timebase-frequency = <0>;
|
|
+ bus-frequency = <0>;
|
|
+ clock-frequency = <0>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ memory {
|
|
+ device_type = "memory";
|
|
+ reg = <0x00000000 0x20000000>; // 512MB at 0
|
|
+ };
|
|
+
|
|
+ localbus@e0005000 {
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <1>;
|
|
+ compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
|
|
+ reg = <0xe0005000 0x1000>;
|
|
+ interrupts = <77 0x8>;
|
|
+ interrupt-parent = <&ipic>;
|
|
+ ranges = <0x0 0x0 0xfc000000 0x04000000>;
|
|
+
|
|
+ flash@0,0 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ compatible = "cfi-flash";
|
|
+ reg = <0x0 0x0 0x4000000>;
|
|
+ bank-width = <2>;
|
|
+ device-width = <1>;
|
|
+
|
|
+ partition@0 {
|
|
+ reg = <0 0x8000>;
|
|
+ label = "u-boot";
|
|
+ read-only;
|
|
+ };
|
|
+
|
|
+ partition@a0000 {
|
|
+ reg = <0xa0000 0x300000>;
|
|
+ label = "kernel";
|
|
+ };
|
|
+
|
|
+ partition@3a0000 {
|
|
+ reg = <0x3a0000 0x3c60000>;
|
|
+ label = "rootfs";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ immr@e0000000 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ device_type = "soc";
|
|
+ compatible = "simple-bus";
|
|
+ ranges = <0x0 0xe0000000 0x00100000>;
|
|
+ reg = <0xe0000000 0x00000200>;
|
|
+ bus-frequency = <0>;
|
|
+
|
|
+ wdt@200 {
|
|
+ device_type = "watchdog";
|
|
+ compatible = "mpc83xx_wdt";
|
|
+ reg = <0x200 0x100>;
|
|
+ };
|
|
+
|
|
+ gpio1: gpio-controller@c00 {
|
|
+ #gpio-cells = <2>;
|
|
+ compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
|
|
+ reg = <0xc00 0x100>;
|
|
+ interrupts = <74 0x8>;
|
|
+ interrupt-parent = <&ipic>;
|
|
+ gpio-controller;
|
|
+ };
|
|
+
|
|
+ gpio2: gpio-controller@d00 {
|
|
+ #gpio-cells = <2>;
|
|
+ compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
|
|
+ reg = <0xd00 0x100>;
|
|
+ interrupts = <75 0x8>;
|
|
+ interrupt-parent = <&ipic>;
|
|
+ gpio-controller;
|
|
+ };
|
|
+
|
|
+ sleep-nexus {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ compatible = "simple-bus";
|
|
+ sleep = <&pmc 0x0c000000>;
|
|
+ ranges;
|
|
+
|
|
+ i2c@3000 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ cell-index = <0>;
|
|
+ compatible = "fsl-i2c";
|
|
+ reg = <0x3000 0x100>;
|
|
+ interrupts = <14 0x8>;
|
|
+ interrupt-parent = <&ipic>;
|
|
+ dfsrr;
|
|
+
|
|
+ at24@50 {
|
|
+ compatible = "at24,24c256";
|
|
+ reg = <0x50>;
|
|
+ };
|
|
+
|
|
+ rtc@68 {
|
|
+ compatible = "dallas,ds1339";
|
|
+ reg = <0x68>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sdhci@2e000 {
|
|
+ compatible = "fsl,mpc8377-esdhc", "fsl,esdhc";
|
|
+ reg = <0x2e000 0x1000>;
|
|
+ interrupts = <42 0x8>;
|
|
+ interrupt-parent = <&ipic>;
|
|
+ clock-frequency = <133333333>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ i2c@3100 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ cell-index = <1>;
|
|
+ compatible = "fsl-i2c";
|
|
+ reg = <0x3100 0x100>;
|
|
+ interrupts = <15 0x8>;
|
|
+ interrupt-parent = <&ipic>;
|
|
+ dfsrr;
|
|
+ };
|
|
+
|
|
+ spi@7000 {
|
|
+ cell-index = <0>;
|
|
+ compatible = "fsl,spi";
|
|
+ reg = <0x7000 0x1000>;
|
|
+ interrupts = <16 0x8>;
|
|
+ interrupt-parent = <&ipic>;
|
|
+ mode = "cpu";
|
|
+ };
|
|
+
|
|
+ dma@82a8 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ compatible = "fsl,mpc8377-dma", "fsl,elo-dma";
|
|
+ reg = <0x82a8 4>;
|
|
+ ranges = <0 0x8100 0x1a8>;
|
|
+ interrupt-parent = <&ipic>;
|
|
+ interrupts = <71 8>;
|
|
+ cell-index = <0>;
|
|
+ dma-channel@0 {
|
|
+ compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
|
|
+ reg = <0 0x80>;
|
|
+ cell-index = <0>;
|
|
+ interrupt-parent = <&ipic>;
|
|
+ interrupts = <71 8>;
|
|
+ };
|
|
+ dma-channel@80 {
|
|
+ compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
|
|
+ reg = <0x80 0x80>;
|
|
+ cell-index = <1>;
|
|
+ interrupt-parent = <&ipic>;
|
|
+ interrupts = <71 8>;
|
|
+ };
|
|
+ dma-channel@100 {
|
|
+ compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
|
|
+ reg = <0x100 0x80>;
|
|
+ cell-index = <2>;
|
|
+ interrupt-parent = <&ipic>;
|
|
+ interrupts = <71 8>;
|
|
+ };
|
|
+ dma-channel@180 {
|
|
+ compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
|
|
+ reg = <0x180 0x28>;
|
|
+ cell-index = <3>;
|
|
+ interrupt-parent = <&ipic>;
|
|
+ interrupts = <71 8>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usb@23000 {
|
|
+ compatible = "fsl-usb2-dr";
|
|
+ reg = <0x23000 0x1000>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ interrupt-parent = <&ipic>;
|
|
+ interrupts = <38 0x8>;
|
|
+ phy_type = "ulpi";
|
|
+ sleep = <&pmc 0x00c00000>;
|
|
+ };
|
|
+
|
|
+ enet0: ethernet@24000 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ cell-index = <0>;
|
|
+ device_type = "network";
|
|
+ model = "eTSEC";
|
|
+ compatible = "gianfar";
|
|
+ reg = <0x24000 0x1000>;
|
|
+ ranges = <0x0 0x24000 0x1000>;
|
|
+ local-mac-address = [ 00 00 00 00 00 00 ];
|
|
+ interrupts = <32 0x8 33 0x8 34 0x8>;
|
|
+ phy-connection-type = "mii";
|
|
+ interrupt-parent = <&ipic>;
|
|
+ tbi-handle = <&tbi0>;
|
|
+ phy-handle = <&phy2>;
|
|
+ sleep = <&pmc 0xc0000000>;
|
|
+ fsl,magic-packet;
|
|
+
|
|
+ mdio@520 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ compatible = "fsl,gianfar-mdio";
|
|
+ reg = <0x520 0x20>;
|
|
+
|
|
+ phy2: ethernet-phy@2 {
|
|
+ interrupt-parent = <&ipic>;
|
|
+ interrupts = <17 0x8>;
|
|
+ reg = <0x2>;
|
|
+ device_type = "ethernet-phy";
|
|
+ };
|
|
+
|
|
+ phy3: ethernet-phy@3 {
|
|
+ interrupt-parent = <&ipic>;
|
|
+ interrupts = <18 0x8>;
|
|
+ reg = <0x3>;
|
|
+ device_type = "ethernet-phy";
|
|
+ };
|
|
+
|
|
+ tbi0: tbi-phy@11 {
|
|
+ reg = <0x11>;
|
|
+ device_type = "tbi-phy";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ enet1: ethernet@25000 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ cell-index = <1>;
|
|
+ device_type = "network";
|
|
+ model = "eTSEC";
|
|
+ compatible = "gianfar";
|
|
+ reg = <0x25000 0x1000>;
|
|
+ ranges = <0x0 0x25000 0x1000>;
|
|
+ local-mac-address = [ 00 00 00 00 00 00 ];
|
|
+ interrupts = <35 0x8 36 0x8 37 0x8>;
|
|
+ phy-connection-type = "mii";
|
|
+ interrupt-parent = <&ipic>;
|
|
+ phy-handle = <&phy3>;
|
|
+ tbi-handle = <&tbi1>;
|
|
+ sleep = <&pmc 0x30000000>;
|
|
+ fsl,magic-packet;
|
|
+
|
|
+ mdio@520 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ compatible = "fsl,gianfar-tbi";
|
|
+ reg = <0x520 0x20>;
|
|
+
|
|
+ tbi1: tbi-phy@11 {
|
|
+ reg = <0x11>;
|
|
+ device_type = "tbi-phy";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ serial0: serial@4500 {
|
|
+ cell-index = <0>;
|
|
+ device_type = "serial";
|
|
+ compatible = "ns16550";
|
|
+ reg = <0x4500 0x100>;
|
|
+ clock-frequency = <0>;
|
|
+ interrupts = <9 0x8>;
|
|
+ interrupt-parent = <&ipic>;
|
|
+ };
|
|
+
|
|
+ serial1: serial@4600 {
|
|
+ cell-index = <1>;
|
|
+ device_type = "serial";
|
|
+ compatible = "ns16550";
|
|
+ reg = <0x4600 0x100>;
|
|
+ clock-frequency = <0>;
|
|
+ interrupts = <10 0x8>;
|
|
+ interrupt-parent = <&ipic>;
|
|
+ };
|
|
+
|
|
+ crypto@30000 {
|
|
+ compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
|
|
+ "fsl,sec2.1", "fsl,sec2.0";
|
|
+ reg = <0x30000 0x10000>;
|
|
+ interrupts = <11 0x8>;
|
|
+ interrupt-parent = <&ipic>;
|
|
+ fsl,num-channels = <4>;
|
|
+ fsl,channel-fifo-len = <24>;
|
|
+ fsl,exec-units-mask = <0x9fe>;
|
|
+ fsl,descriptor-types-mask = <0x3ab0ebf>;
|
|
+ sleep = <&pmc 0x03000000>;
|
|
+ };
|
|
+
|
|
+ sata@18000 {
|
|
+ compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
|
|
+ reg = <0x18000 0x1000>;
|
|
+ interrupts = <44 0x8>;
|
|
+ interrupt-parent = <&ipic>;
|
|
+ sleep = <&pmc 0x000000c0>;
|
|
+ };
|
|
+
|
|
+ sata@19000 {
|
|
+ compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
|
|
+ reg = <0x19000 0x1000>;
|
|
+ interrupts = <45 0x8>;
|
|
+ interrupt-parent = <&ipic>;
|
|
+ sleep = <&pmc 0x00000030>;
|
|
+ };
|
|
+
|
|
+ /* IPIC
|
|
+ * interrupts cell = <intr #, sense>
|
|
+ * sense values match linux IORESOURCE_IRQ_* defines:
|
|
+ * sense == 8: Level, low assertion
|
|
+ * sense == 2: Edge, high-to-low change
|
|
+ */
|
|
+ ipic: interrupt-controller@700 {
|
|
+ compatible = "fsl,ipic";
|
|
+ interrupt-controller;
|
|
+ #address-cells = <0>;
|
|
+ #interrupt-cells = <2>;
|
|
+ reg = <0x700 0x100>;
|
|
+ };
|
|
+
|
|
+ pmc: power@b00 {
|
|
+ compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
|
|
+ reg = <0xb00 0x100 0xa00 0x100>;
|
|
+ interrupts = <80 0x8>;
|
|
+ interrupt-parent = <&ipic>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pci0: pci@e0008500 {
|
|
+ interrupt-map-mask = <0xf800 0 0 7>;
|
|
+ interrupt-map = <
|
|
+ /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
|
|
+
|
|
+ /* IDSEL AD14 IRQ6 inta */
|
|
+ 0x7000 0x0 0x0 0x1 &ipic 22 0x8
|
|
+
|
|
+ /* IDSEL AD15 IRQ5 inta */
|
|
+ 0x7800 0x0 0x0 0x1 &ipic 21 0x8>;
|
|
+ interrupt-parent = <&ipic>;
|
|
+ interrupts = <66 0x8>;
|
|
+ bus-range = <0 0>;
|
|
+ ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
|
|
+ 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
|
|
+ 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
|
|
+ sleep = <&pmc 0x00010000>;
|
|
+ clock-frequency = <66666666>;
|
|
+ #interrupt-cells = <1>;
|
|
+ #size-cells = <2>;
|
|
+ #address-cells = <3>;
|
|
+ reg = <0xe0008500 0x100 /* internal registers */
|
|
+ 0xe0008300 0x8>; /* config space access registers */
|
|
+ compatible = "fsl,mpc8349-pci";
|
|
+ device_type = "pci";
|
|
+ };
|
|
+
|
|
+ pci1: pcie@e0009000 {
|
|
+ #address-cells = <3>;
|
|
+ #size-cells = <2>;
|
|
+ #interrupt-cells = <1>;
|
|
+ device_type = "pci";
|
|
+ compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
|
|
+ reg = <0xe0009000 0x00001000>;
|
|
+ ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
|
|
+ 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
|
|
+ bus-range = <0 255>;
|
|
+ interrupt-map-mask = <0xf800 0 0 7>;
|
|
+ interrupt-map = <0 0 0 1 &ipic 1 8
|
|
+ 0 0 0 2 &ipic 1 8
|
|
+ 0 0 0 3 &ipic 1 8
|
|
+ 0 0 0 4 &ipic 1 8>;
|
|
+ sleep = <&pmc 0x00300000>;
|
|
+ clock-frequency = <0>;
|
|
+
|
|
+ pcie@0 {
|
|
+ #address-cells = <3>;
|
|
+ #size-cells = <2>;
|
|
+ device_type = "pci";
|
|
+ reg = <0 0 0 0 0>;
|
|
+ ranges = <0x02000000 0 0xa8000000
|
|
+ 0x02000000 0 0xa8000000
|
|
+ 0 0x10000000
|
|
+ 0x01000000 0 0x00000000
|
|
+ 0x01000000 0 0x00000000
|
|
+ 0 0x00800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pci2: pcie@e000a000 {
|
|
+ #address-cells = <3>;
|
|
+ #size-cells = <2>;
|
|
+ #interrupt-cells = <1>;
|
|
+ device_type = "pci";
|
|
+ compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
|
|
+ reg = <0xe000a000 0x00001000>;
|
|
+ ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
|
|
+ 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
|
|
+ bus-range = <0 255>;
|
|
+ interrupt-map-mask = <0xf800 0 0 7>;
|
|
+ interrupt-map = <0 0 0 1 &ipic 2 8
|
|
+ 0 0 0 2 &ipic 2 8
|
|
+ 0 0 0 3 &ipic 2 8
|
|
+ 0 0 0 4 &ipic 2 8>;
|
|
+ sleep = <&pmc 0x000c0000>;
|
|
+ clock-frequency = <0>;
|
|
+
|
|
+ pcie@0 {
|
|
+ #address-cells = <3>;
|
|
+ #size-cells = <2>;
|
|
+ device_type = "pci";
|
|
+ reg = <0 0 0 0 0>;
|
|
+ ranges = <0x02000000 0 0xc8000000
|
|
+ 0x02000000 0 0xc8000000
|
|
+ 0 0x10000000
|
|
+ 0x01000000 0 0x00000000
|
|
+ 0x01000000 0 0x00000000
|
|
+ 0 0x00800000>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
--- a/arch/powerpc/platforms/83xx/Kconfig
|
|
+++ b/arch/powerpc/platforms/83xx/Kconfig
|
|
@@ -84,11 +84,11 @@ config MPC837x_MDS
|
|
This option enables support for the MPC837x MDS Processor Board.
|
|
|
|
config MPC837x_RDB
|
|
- bool "Freescale MPC837x RDB"
|
|
+ bool "Freescale MPC837x RDB/WLAN"
|
|
select DEFAULT_UIMAGE
|
|
select PPC_MPC837x
|
|
help
|
|
- This option enables support for the MPC837x RDB Board.
|
|
+ This option enables support for the MPC837x RDB and WLAN Boards.
|
|
|
|
config SBC834x
|
|
bool "Wind River SBC834x"
|
|
--- a/arch/powerpc/platforms/83xx/mpc837x_rdb.c
|
|
+++ b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
|
|
@@ -86,11 +86,12 @@ static int __init mpc837x_rdb_probe(void
|
|
|
|
return of_flat_dt_is_compatible(root, "fsl,mpc8377rdb") ||
|
|
of_flat_dt_is_compatible(root, "fsl,mpc8378rdb") ||
|
|
- of_flat_dt_is_compatible(root, "fsl,mpc8379rdb");
|
|
+ of_flat_dt_is_compatible(root, "fsl,mpc8379rdb") ||
|
|
+ of_flat_dt_is_compatible(root, "fsl,mpc8377wlan");
|
|
}
|
|
|
|
define_machine(mpc837x_rdb) {
|
|
- .name = "MPC837x RDB",
|
|
+ .name = "MPC837x RDB/WLAN",
|
|
.probe = mpc837x_rdb_probe,
|
|
.setup_arch = mpc837x_rdb_setup_arch,
|
|
.init_IRQ = mpc837x_rdb_init_IRQ,
|