mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-19 17:17:31 +02:00
5803cbb537
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@21895 3c298f89-4303-0410-b956-a3cf2f4a3e73
138 lines
3.4 KiB
Diff
138 lines
3.4 KiB
Diff
--- a/drivers/ata/pata_ixp4xx_cf.c
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+++ b/drivers/ata/pata_ixp4xx_cf.c
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@@ -24,16 +24,58 @@
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#include <scsi/scsi_host.h>
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#define DRV_NAME "pata_ixp4xx_cf"
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-#define DRV_VERSION "0.2"
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+#define DRV_VERSION "0.3"
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static int ixp4xx_set_mode(struct ata_link *link, struct ata_device **error)
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{
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struct ata_device *dev;
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+ struct ixp4xx_pata_data *data = link->ap->host->dev->platform_data;
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+ unsigned int pio_mask;
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ata_for_each_dev(dev, link, ENABLED) {
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- ata_dev_printk(dev, KERN_INFO, "configured for PIO0\n");
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- dev->pio_mode = XFER_PIO_0;
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- dev->xfer_mode = XFER_PIO_0;
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+ if (dev->id[ATA_ID_FIELD_VALID] & (1 << 1)) {
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+ pio_mask = dev->id[ATA_ID_PIO_MODES] & 0x03;
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+ if (pio_mask & (1 << 1)) {
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+ pio_mask = 4;
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+ } else {
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+ pio_mask = 3;
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+ }
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+ } else {
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+ pio_mask = (dev->id[ATA_ID_OLD_PIO_MODES] >> 8);
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+ }
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+
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+ switch (pio_mask){
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+ case 0:
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+ ata_dev_printk(dev, KERN_INFO, "configured for PIO0\n");
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+ dev->pio_mode = XFER_PIO_0;
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+ dev->xfer_mode = XFER_PIO_0;
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+ *data->cs0_cfg = 0x8a473c03;
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+ break;
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+ case 1:
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+ ata_dev_printk(dev, KERN_INFO, "configured for PIO1\n");
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+ dev->pio_mode = XFER_PIO_1;
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+ dev->xfer_mode = XFER_PIO_1;
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+ *data->cs0_cfg = 0x86433c03;
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+ break;
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+ case 2:
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+ ata_dev_printk(dev, KERN_INFO, "configured for PIO2\n");
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+ dev->pio_mode = XFER_PIO_2;
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+ dev->xfer_mode = XFER_PIO_2;
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+ *data->cs0_cfg = 0x82413c03;
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+ break;
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+ case 3:
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+ ata_dev_printk(dev, KERN_INFO, "configured for PIO3\n");
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+ dev->pio_mode = XFER_PIO_3;
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+ dev->xfer_mode = XFER_PIO_3;
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+ *data->cs0_cfg = 0x80823c03;
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+ break;
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+ case 4:
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+ ata_dev_printk(dev, KERN_INFO, "configured for PIO4\n");
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+ dev->pio_mode = XFER_PIO_4;
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+ dev->xfer_mode = XFER_PIO_4;
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+ *data->cs0_cfg = 0x80403c03;
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+ break;
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+ }
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dev->xfer_shift = ATA_SHIFT_PIO;
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dev->flags |= ATA_DFLAG_PIO;
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}
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@@ -46,6 +88,7 @@ static unsigned int ixp4xx_mmio_data_xfe
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unsigned int i;
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unsigned int words = buflen >> 1;
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u16 *buf16 = (u16 *) buf;
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+ unsigned int pio_mask;
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struct ata_port *ap = dev->link->ap;
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void __iomem *mmio = ap->ioaddr.data_addr;
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struct ixp4xx_pata_data *data = ap->host->dev->platform_data;
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@@ -53,8 +96,34 @@ static unsigned int ixp4xx_mmio_data_xfe
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/* set the expansion bus in 16bit mode and restore
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* 8 bit mode after the transaction.
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*/
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- *data->cs0_cfg &= ~(0x01);
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- udelay(100);
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+ if (dev->id[ATA_ID_FIELD_VALID] & (1 << 1)){
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+ pio_mask = dev->id[ATA_ID_PIO_MODES] & 0x03;
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+ if (pio_mask & (1 << 1)){
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+ pio_mask = 4;
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+ }else{
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+ pio_mask = 3;
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+ }
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+ }else{
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+ pio_mask = (dev->id[ATA_ID_OLD_PIO_MODES] >> 8);
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+ }
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+ switch (pio_mask){
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+ case 0:
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+ *data->cs0_cfg = 0xa9643c42;
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+ break;
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+ case 1:
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+ *data->cs0_cfg = 0x85033c42;
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+ break;
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+ case 2:
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+ *data->cs0_cfg = 0x80b23c42;
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+ break;
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+ case 3:
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+ *data->cs0_cfg = 0x80823c42;
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+ break;
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+ case 4:
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+ *data->cs0_cfg = 0x80403c42;
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+ break;
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+ }
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+ udelay(5);
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/* Transfer multiple of 2 bytes */
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if (rw == READ)
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@@ -79,8 +148,24 @@ static unsigned int ixp4xx_mmio_data_xfe
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words++;
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}
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- udelay(100);
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- *data->cs0_cfg |= 0x01;
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+ udelay(5);
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+ switch (pio_mask){
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+ case 0:
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+ *data->cs0_cfg = 0x8a473c03;
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+ break;
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+ case 1:
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+ *data->cs0_cfg = 0x86433c03;
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+ break;
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+ case 2:
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+ *data->cs0_cfg = 0x82413c03;
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+ break;
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+ case 3:
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+ *data->cs0_cfg = 0x80823c03;
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+ break;
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+ case 4:
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+ *data->cs0_cfg = 0x80403c03;
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+ break;
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+ }
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return words << 1;
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}
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