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git://projects.qi-hardware.com/openwrt-xburst.git
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4c8d6ad4d0
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31060 3c298f89-4303-0410-b956-a3cf2f4a3e73
49 lines
1.7 KiB
Diff
49 lines
1.7 KiB
Diff
From e97f45d255f4a223d38e2f39c1ddf7a3e0766527 Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Thu, 27 Oct 2011 20:06:30 +0200
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Subject: [PATCH 14/70] MIPS: lantiq: fix pull gpio up resistors usage
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The register that enables a gpios internal pullups was not used. This patch
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makes sure the pullups are activated correctly.
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Signed-off-by: Matti Laakso <malaakso@elisanet.fi>
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/lantiq/xway/gpio.c | 6 ++++++
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1 files changed, 6 insertions(+), 0 deletions(-)
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diff --git a/arch/mips/lantiq/xway/gpio.c b/arch/mips/lantiq/xway/gpio.c
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index f204f6c..14ff7c7 100644
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--- a/arch/mips/lantiq/xway/gpio.c
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+++ b/arch/mips/lantiq/xway/gpio.c
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@@ -21,6 +21,8 @@
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#define LTQ_GPIO_ALTSEL0 0x0C
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#define LTQ_GPIO_ALTSEL1 0x10
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#define LTQ_GPIO_OD 0x14
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+#define LTQ_GPIO_PUDSEL 0x1C
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+#define LTQ_GPIO_PUDEN 0x20
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#define PINS_PER_PORT 16
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#define MAX_PORTS 3
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@@ -106,6 +108,8 @@ static int ltq_gpio_direction_input(struct gpio_chip *chip, unsigned int offset)
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ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_OD, offset);
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ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_DIR, offset);
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+ ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_PUDSEL, offset);
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+ ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_PUDEN, offset);
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return 0;
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}
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@@ -117,6 +121,8 @@ static int ltq_gpio_direction_output(struct gpio_chip *chip,
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ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_OD, offset);
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ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_DIR, offset);
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+ ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_PUDSEL, offset);
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+ ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_PUDEN, offset);
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ltq_gpio_set(chip, offset, value);
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return 0;
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--
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1.7.7.1
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