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ca78cbf57d
The defined offset is wrong and the fixup-code overrides it later on so that it never gets used for most PCI devices. Unfortunately the yenta-socket allocates its own resources and crashes because of the wrong mem_offset. It seems that the offset and fixup code came from 2.4 where resource allocation was handled differently. This patch removes the unneeded parts and thus enables the yenta_socket on the WRT54G3G platform. It was tested on Asus WL500G-Premium (v1 and v2), Linksys WRT54G3G, Netgear WGT634U Signed-off-by: Michael Buesch <mb@bu3sch.de> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@20239 3c298f89-4303-0410-b956-a3cf2f4a3e73
54 lines
1.8 KiB
Diff
54 lines
1.8 KiB
Diff
Index: linux-2.6.33/drivers/ssb/driver_pcicore.c
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===================================================================
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--- linux-2.6.33.orig/drivers/ssb/driver_pcicore.c 2010-03-15 14:52:55.000000000 +0100
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+++ linux-2.6.33/drivers/ssb/driver_pcicore.c 2010-03-15 15:57:38.000000000 +0100
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@@ -246,20 +246,12 @@
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.pci_ops = &ssb_pcicore_pciops,
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.io_resource = &ssb_pcicore_io_resource,
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.mem_resource = &ssb_pcicore_mem_resource,
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- .mem_offset = 0x24000000,
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};
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-static u32 ssb_pcicore_pcibus_iobase = 0x100;
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-static u32 ssb_pcicore_pcibus_membase = SSB_PCI_DMA;
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-
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/* This function is called when doing a pci_enable_device().
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* We must first check if the device is a device on the PCI-core bridge. */
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int ssb_pcicore_plat_dev_init(struct pci_dev *d)
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{
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- struct resource *res;
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- int pos, size;
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- u32 *base;
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-
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if (d->bus->ops != &ssb_pcicore_pciops) {
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/* This is not a device on the PCI-core bridge. */
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return -ENODEV;
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@@ -268,27 +260,6 @@
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ssb_printk(KERN_INFO "PCI: Fixing up device %s\n",
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pci_name(d));
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- /* Fix up resource bases */
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- for (pos = 0; pos < 6; pos++) {
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- res = &d->resource[pos];
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- if (res->flags & IORESOURCE_IO)
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- base = &ssb_pcicore_pcibus_iobase;
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- else
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- base = &ssb_pcicore_pcibus_membase;
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- res->flags |= IORESOURCE_PCI_FIXED;
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- if (res->end) {
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- size = res->end - res->start + 1;
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- if (*base & (size - 1))
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- *base = (*base + size) & ~(size - 1);
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- res->start = *base;
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- res->end = res->start + size - 1;
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- *base += size;
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- pci_write_config_dword(d, PCI_BASE_ADDRESS_0 + (pos << 2), res->start);
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- }
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- /* Fix up PCI bridge BAR0 only */
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- if (d->bus->number == 0 && PCI_SLOT(d->devfn) == 0)
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- break;
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- }
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/* Fix up interrupt lines */
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d->irq = ssb_mips_irq(extpci_core->dev) + 2;
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pci_write_config_byte(d, PCI_INTERRUPT_LINE, d->irq);
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