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eac20bee29
* update patches to 3.0 * add basic vr9 support * backport 3.1 fixes * backport 3.2 queue (falcon) git-svn-id: svn://svn.openwrt.org/openwrt/trunk@28405 3c298f89-4303-0410-b956-a3cf2f4a3e73
68 lines
2.3 KiB
Diff
68 lines
2.3 KiB
Diff
From 91f8d0c8fbb9ea70bf78a291e312157177be8ee3 Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Sat, 20 Aug 2011 18:55:13 +0200
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Subject: [PATCH 01/24] MIPS: lantiq: fix early printk
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The code was using a 32bit write operation in the early_printk code. This
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resulted in 3 zero bytes also being written to the serial port. Change the
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memory access to 8bit.
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Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
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Signed-off-by: John Crispin <blogic@openwrt.org>
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Cc: linux-mips@linux-mips.org
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---
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.../mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 4 ++++
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arch/mips/lantiq/early_printk.c | 14 ++++++++------
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2 files changed, 12 insertions(+), 6 deletions(-)
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diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
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index 8a3c6be..e6d1ca0 100644
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--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
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+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
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@@ -34,6 +34,10 @@
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#define LTQ_ASC1_BASE_ADDR 0x1E100C00
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#define LTQ_ASC_SIZE 0x400
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+/* during early_printk no ioremap is possible
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+ lets use KSEG1 instead */
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+#define LTQ_EARLY_ASC KSEG1ADDR(LTQ_ASC1_BASE_ADDR)
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+
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/* RCU - reset control unit */
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#define LTQ_RCU_BASE_ADDR 0x1F203000
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#define LTQ_RCU_SIZE 0x1000
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diff --git a/arch/mips/lantiq/early_printk.c b/arch/mips/lantiq/early_printk.c
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index 972e05f..5089075 100644
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--- a/arch/mips/lantiq/early_printk.c
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+++ b/arch/mips/lantiq/early_printk.c
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@@ -12,11 +12,13 @@
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#include <lantiq.h>
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#include <lantiq_soc.h>
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-/* no ioremap possible at this early stage, lets use KSEG1 instead */
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-#define LTQ_ASC_BASE KSEG1ADDR(LTQ_ASC1_BASE_ADDR)
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#define ASC_BUF 1024
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-#define LTQ_ASC_FSTAT ((u32 *)(LTQ_ASC_BASE + 0x0048))
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-#define LTQ_ASC_TBUF ((u32 *)(LTQ_ASC_BASE + 0x0020))
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+#define LTQ_ASC_FSTAT ((u32 *)(LTQ_EARLY_ASC + 0x0048))
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+#ifdef __BIG_ENDIAN
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+#define LTQ_ASC_TBUF ((u32 *)(LTQ_EARLY_ASC + 0x0020 + 3))
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+#else
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+#define LTQ_ASC_TBUF ((u32 *)(LTQ_EARLY_ASC + 0x0020))
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+#endif
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#define TXMASK 0x3F00
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#define TXOFFSET 8
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@@ -27,7 +29,7 @@ void prom_putchar(char c)
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local_irq_save(flags);
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do { } while ((ltq_r32(LTQ_ASC_FSTAT) & TXMASK) >> TXOFFSET);
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if (c == '\n')
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- ltq_w32('\r', LTQ_ASC_TBUF);
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- ltq_w32(c, LTQ_ASC_TBUF);
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+ ltq_w8('\r', LTQ_ASC_TBUF);
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+ ltq_w8(c, LTQ_ASC_TBUF);
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local_irq_restore(flags);
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}
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--
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1.7.5.4
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